Magneto-electric magnetic tunnel junction logic devices

Sharma, Navneet; Marshall, Andrew; Bird, Jonathan P.; Dowben, Peter A.

doi:10.1109/e3s.2015.7336817

Cited by 15 publications

(20 citation statements)

References 3 publications

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“…The most commonly discussed readout mechanism relies on tunneling magnetoresistance (TMR), where the voltagecontrolled FM film constitutes the free layer of the TMR trilayer [1], [22]- [26], [31]- [37]. Problems arise with leakage currents, canted magnetization (as may occur with very high critical temperature MEs), and when scaling to very small dimensions.…”

Section: Introductionmentioning

confidence: 99%

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Dowben

Binek

Zhang

et al. 2018

IEEE J. Explor. Solid-State Comput. Devices Circuits

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Here, we outline magnetoelectric (ME) device concepts based on the voltage control of the interface magnetism of an ME antiferromagnet gate dielectric formed on a very thin semiconductor channel with large spin-orbit coupling (SOC). The emphasis of the ME spin field-effect transistors (ME spin FET) is on an antiferromagnet spin-orbit read logic device and a ME spin-FET multiplexer. Both spin-FET schemes exploit the strong SOC in the semiconducting channel materials but remain dependent on the voltage-induced switching of an ME, so that the switching time is limited only by the switching dynamics of the ME. The induced exchange field spin polarizes the channel material, breaks time-reversal symmetry, and results in the preferential charge transport direction, due to the spin-orbit-driven spin-momentum locking. These devices could provide reliable room temperature operation with large on/off ratios, well beyond what can be achieved using magnetic tunnel junctions. All of the proposed device spintronic functionalities without the need to switch a ferromagnet, yielding a faster writing speed (∼10 ps) at a lower cost in energy (∼10 aJ), excellent temperature stability (operational up to 400 K or above), and requiring far fewer device elements (transistor equivalents) than CMOS.INDEX TERMS Magnetoelectric (ME) transistor, nonvolatile logic and memory, spin-orbit coupling (SOC).

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Section: Introductionmentioning

confidence: 99%

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Dowben

Binek

Zhang

et al. 2018

IEEE J. Explor. Solid-State Comput. Devices Circuits

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“…By connecting AFMFET devices in the pull-up and pull-down networks properly, all complementary logic functions can be achieved. The voltage generated at the output is static, which can directly drive the input of the next stage without using auxiliary field-effect transistors or any special clocking schemes as needed in prior magnetoelectric-based device proposals [12].…”

Section: Proposed Logic Implementationmentioning

confidence: 99%

“…From the experimental results in [22], the typical domain size in chromium is about 5 µm, which is more than 10× larger compared to the AFM layer used in this paper. Therefore, a single-domain assumption is expected to be valid, and this property has been used in the past proposals to implement a majority gate based on the MEMTJ device [12], [23]. In these proposals, three input gates are used and the surface magnetization of chromium is controlled by the majority of the inputs.…”

Section: Proposed Logic Implementationmentioning

confidence: 99%

“…5. Compared to the prior magnetoelectric majority logic gate proposals [12], [23] that use a dynamic logic style to implement Boolean logic, the proposed majority gate does not need a dedicated preset clocking and is more compatible with the CMOS static circuits and standard cell design.…”

Section: Proposed Logic Implementationmentioning

confidence: 99%

“…To improve the computing energy efficiency, voltagecontrolled spintronic devices have been proposed. Some promising candidates include magnetoelectric magnetic tunnel junction (MEMTJ) devices, spin wave device (SWD), and composite-input magnetoelectric-based logic technology (CoMET) [10]- [12]. From a recent beyond-CMOS device benchmarking research, voltage-controlled spintronic devices are expected to dissipate the orders of magnitude less energy per binary switching operation compared to current-controlled magnetic devices [13].…”

Section: Introductionmentioning

confidence: 99%

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Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors

Pan

Naeemi

2018

IEEE J. Explor. Solid-State Comput. Devices Circuits

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In this paper, a compact and complementary logic implementation is proposed for antiferromagnet field-effect transistor (AFMFET) devices. The implementation enables a complete set of Boolean operations based on complementary logic as well as majority-gate logic. The impacts of several key device-level design parameters are investigated, such as the channel resistance and critical switching voltage, and their optimal values that minimize the overall energy-delay product (EDP) of a 32-bit arithmetic logic unit are quantified. In addition, it is shown that one can potentially take advantage of the large domain size of some AFM materials such as chromium and build a compact majority-gate-based logic. The potential performance benefits of the majority-gate-based logic are also quantified. Compared to the conventional CMOS logic circuit, the one with AFMFET devices using majority gates can potentially achieve 10× improvement in terms of the EDP.

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The spin polarization of palladium on magneto-electric Cr₂O₃

Komesu

Echtenkamp

Binek

et al. 2023

J. Phys.: Condens. Matter

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While induced polarization of a palladium overlayer on antiferromagnetic and magneto-electric Cr2O3(0001) is possible because of the boundary polarization at the Cr2O3(0001), in the single domain state, the palladium (Pd) thin film appears to be ferromagnetic on its own, likely as a result of strain. In the conduction band, we find the experimental evidence of ferromagnetic spin polarized in Pd thin films on a Cr2O3(0001) single crystal, especially in the thin limit, Pd thickness of around 1-4 nm. Indeed there is significant spin polarization in 10 Å thick Pd films on Cr2O3(0001) at 310 K, i.e. above the Néel temperature of bulk Cr2O3. While Cr2O3(0001) has surface moments that tend to align along the surface normal, for Pd on Cr2O3, the spin polarization contains an in-plane component. Strain in the Pd adlayer on Cr2O3(0001) appears correlated to the spin polarization measured in spin polarized inverse photoemission spectroscopy. Further evidence for magnetization of Pd on Cr2O3 is provided by measurement of the exchange bias fields in Cr2O3/Pd(buffer)/[Co/Pd]n exchange bias systems. The magnitude of the exchange bias field is, over a wide temperature range, virtually unaffected by the Pd thickness variation between 1 and 2 nm.

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Magneto-electric magnetic tunnel junction logic devices

Cited by 15 publications

References 3 publications

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors

The spin polarization of palladium on magneto-electric Cr₂O₃

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Magneto-electric magnetic tunnel junction logic devices

Cited by 15 publications

References 3 publications

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Towards a Strong Spin–Orbit Coupling Magnetoelectric Transistor

Complementary Logic Implementation for Antiferromagnet Field-Effect Transistors

The spin polarization of palladium on magneto-electric Cr2O3

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Product

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The spin polarization of palladium on magneto-electric Cr₂O₃