Machine learning model for predicting threshold voltage by taper angle variation and word line position in 3D NAND flash memory

Lee, Jun Young; Lee, Jang Kyu; Shin, Hyungcheol

doi:10.1587/elex.17.20200345

Cited by 4 publications

(2 citation statements)

References 28 publications

(28 reference statements)

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“…23 Kumar et al chose the minimum tunneling width of tunneling field-effect transistors as a variable to predict threshold voltage, reporting an R 2 value of 96.5%, 24 and Lee et al employed deep neural regression and trained threshold voltage for the structural parameters of 3D NAND flash memories, achieving a relative error of 0.28%. In contrast to previous TCAD-based reports, 25 Akbar et al applied random forest regression and trained the relationship between transfer curves and the length and width of tunneling field-effect transistors as input data. 26 Machine learning-based predictions were compared with those produced by simulations, confirming a root mean squared error of 1.2% to 4.4%.…”

Section: Data Number Mobilitymentioning

confidence: 99%

Machine Learning–Assisted Thin-Film Transistor Characterization: A Case Study of Amorphous Indium Gallium Zinc Oxide (IGZO) Thin-Film Transistors

Song

Shin

et al. 2022

ECS J. Solid State Sci. Technol.

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Machine learning was applied to classify the device characteristics of indium gallium zinc oxide (IGZO) thin-film transistors (TFTs). A K-means approach was employed for initial clustering of IGZO transfer curves into three of four grades (high, medium-high, medium, and low) of TFT performance according to qualitative features. A 2-layered artificial neural network (ANN) and 4-layered deep neural network (DNN) were used to extract mobility, threshold voltage, on/off current ratio, and sub-threshold slope device parameters from high-grade and medium-high-grade oxide TFTs. Ground-truth device parameters were calculated using in-house codes based on a rules-based approach consistent with the definitions employed to train the ANN and DNN. The DNN-predicted parameters were in closer agreement with manual and macro-based calculations than were those obtained from the ANN. Synergistic integration of K-means clustering and DNN effectively extracted TFT device parameters encountered in processing high volumes of data in industrial and academic domains of the microelectronics field.

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Section: Data Number Mobilitymentioning

confidence: 99%

Machine Learning–Assisted Thin-Film Transistor Characterization: A Case Study of Amorphous Indium Gallium Zinc Oxide (IGZO) Thin-Film Transistors

Song

Shin

et al. 2022

ECS J. Solid State Sci. Technol.

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show abstract

“…In addition, considering process variation is essential for the bit error rate prediction, and this approach does not provide the variability models for GIDL characteristics. In [10][11], the authors proposed a machine learning approach that reproduces the variations of threshold voltage (V th ) and current (I on ) in the 3D V-NAND cells. The model is based on an artificial neural network (ANN) whose inputs are variability sources and electrical parameters.…”

Section: Introductionmentioning

confidence: 99%

Simulation Acceleration of Bit Error Rate Prediction and Yield Optimization of 3D V-NAND Flash Memory

Kim,

Kim

2023

IEEE Access

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When designing 3D V-NAND technologies with a gate induced drain leakage (GIDL) assisted erase scheme, many experiments must be conducted to determine the optimal GIDL design targets to achieve fast erase performance and secure yield characteristics. However, only a limited amount of data can be used since V-NAND processes are time-consuming and expensive in the early stage of development. TCAD and numerical methods also require a considerable amount of time and effort to calculate bit error rate (BER), and it is impossible to explore the entire design spaces in time. In this paper, we propose a novel simulation acceleration technique for bit error rate prediction and yield optimization in 3D V-NAND technology. This acceleration framework includes a machine learning (ML)-based compact model for the lognormal variability of GIDL currents and a physics-inspired slow cell model for the read margin reduction. Using a combination of these models with efficient Monte Carlo (MC) circuit simulations, we can accurately estimate threshold voltage (V th ) distributions to explore the entire design spaces using a limited amount of data. Based on the proposed technique, the predictive model achieves high accuracy in the current 176-layer V-NAND technology, and it also provides high scalability with respect to GIDL transistor geometries, temperatures, supply voltages, variabilities, and the number of stacking layers. Moreover, a contour map of bit error rate is newly introduced for the efficient design space exploration and read margin prediction. Therefore, the results indicate that the proposed framework can be further extended to large-scale experimental data and new architectures to accelerate the yield optimization in nextgeneration 3D V-NAND flash memory development.

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Machine Learning for 3D NAND Flash and Solid State Drives Reliability/Performance Optimization

Zambelli

Micheloni

Olivo

2022

Machine Learning and Non-Volatile Memories

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Machine learning model for predicting threshold voltage by taper angle variation and word line position in 3D NAND flash memory

Cited by 4 publications

References 28 publications

Machine Learning–Assisted Thin-Film Transistor Characterization: A Case Study of Amorphous Indium Gallium Zinc Oxide (IGZO) Thin-Film Transistors

Machine Learning–Assisted Thin-Film Transistor Characterization: A Case Study of Amorphous Indium Gallium Zinc Oxide (IGZO) Thin-Film Transistors

Simulation Acceleration of Bit Error Rate Prediction and Yield Optimization of 3D V-NAND Flash Memory

Machine Learning for 3D NAND Flash and Solid State Drives Reliability/Performance Optimization

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