&lt;title&gt;Overlay performance on tungsten CMP layers using the ATHENA alignment system&lt;/title&gt;

Rivera, Giovanni; Rozzoni, Laura; Castellana, E.; Miraglia, Guido; Lam, Pui Leng; Plauth, Johannes; Dunbar, Allan; Phillips, Merritt

doi:10.1117/12.386498

Cited by 8 publications

(3 citation statements)

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“…For example, when fifth order enhanced mark is under evaluation, fifth order detector will be used. This practice has also been applied in the previous reported work in evaluation of alignment mark using ATHENA system [2][3][4][5] . We only focused in the evaluation of 5 th order SPM, 5 th order NSPM and 7 th order NSPM.…”

Section: Methodsmentioning

confidence: 93%

Evaluation of alignment marks using ASML ATHENA alignment system in 90-nm BEOL process

Tan

Yeo

Koh³

et al. 2003

SPIE Proceedings

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As the critical dimension (CD) in integrated circuit (IC) device reduces, the total overlay budget needs to be more stringent. Typically, the allowable overlay error is 1/3 of the CD in the IC device. In this case, robustness of alignment mark is critical, as accurate signal is required by the scanner's alignment system to precisely align a layer of pattern to the previous layer. Alignment issue is more severe in back-end process partly due to the influenced of Chemical Mechanical Polishing (CMP), which contribute to the asymmetric or total destruction of the alignment marks. Alignment marks on the wafer can be placed along the scribe-line of the IC pattern. ASML scanner allows such type of wafer alignment using phase grating mark, known as Scribe-line Primary Mark (SPM) which can be fit into a standard 80um scribe-line. In this paper, we have studied the feasibility of introducing Narrow SPM (NSPM) to enable a smaller scribe-line. The width of NSPM has been shrunk down to 70% of the SPM and the length remains the same. It is a challenge to the alignment system to collect the NSPM signal and provide comparable alignment capability. The evaluations were completed using short loop wafers, which focus on back-end-of-line (BEOL) via and metal layers in a 90nm Cu dual damascene low k process. The results also look into the overlay performance using different alignment strategies. Offline overlay measurements were performed to verify the results.

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Section: Methodsmentioning

confidence: 93%

Evaluation of alignment marks using ASML ATHENA alignment system in 90-nm BEOL process

Tan

Yeo

Koh³

et al. 2003

SPIE Proceedings

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“…Generally speaking, scribe line marks (alignment mark, overlay mark, CD bar, monitor pad…) are required to have good detectability and process robustness; overlay marks are required to resemble the in-chip pattern to reflect the device overlay also [1,2,3]. To satisfy this requirement, people would normally use metal or high reflectivity material on the mark pattern and oxide or low reflectivity material on the background region.…”

Section: Introductionmentioning

confidence: 99%

Frame generation methodology in mask tape-out flow and automation application

Yan¹,

Jiang²,

Wang³

et al. 2023

Metrology, Inspection, and Process Control XXXVII

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Mask tape-out is a frequent job in wafer fabrication factories and research institutes. Frame generation is one of the important steps in mask tape-out flow. It requires extensive lithography, process integration, and mask tape-out experience; a large amount of manual work and various data preparation is included, especially when multiple products are combined into a single mask and all product conditions need to be fulfilled simultaneously. When more factors need to be considered, mistakes can be made. We develop a methodology to help frame generation, such as alignment and overlay mark design, selection and placement. It has demonstrated the ability to guide people in error-proofing work, support for frame GDS automatic generation and metrology recipe automatic generation. This is a user-friendly methodology that can reduce the frame generation difficulty and generation time from several weeks to a few minutes.

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“…This is to ensure that overlay performance is within the allowable budget and achieves stability. Rivera et al [155] had studied the performance of alignment marks in the tungsten CMP process of a 0.25 µm device. The overlay of the six metal interconnect layers was below 15 nm.…”

Section: Process Variation To Alignment Performancementioning

confidence: 99%

Electromagnetic ray tracing model for line structures and characterization of advanced alignment marks in photolithography

Tan¹

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Line structures are an essential part in integrated circuit (IC) fabrication. In photolithography, the electromagnetic scattering of line structures is one of the main factors that determine the advancement of the technology node. From the perspective of modeling, a theoretical model to physically understand the scattering phenomenon is necessary for a solid foundation in efficient Abstract _____________________________________________________________________________________________ _____________________________________________________________________________________________ iii ERT model, the electromagnetic field that causes a disturbance in the amplitude profile for the total solution was identified and explained in detail. The accuracy of the ERT model was also verified by comparing with the finite difference time domain (FDTD) solution. For a single polysilicon line structure with width of 1.66 λ (λ is the wavelength) on silicon substrate, the developed ERT model was able to demonstrate amplitude correlation coefficient (ACC) of 0.978 and the maximum amplitude difference, Δ|Ez| of as low as-0.067. The subwavelength line width of 0.4 λ was identified as the limit of the ERT model for the single polysilicon line structure. The study of alignment marks focuses on their performance to meet the stringent overlay requirement for advanced technology node process. The simulation results obtained from rigorous coupled wave analysis (RCWA) demonstrated that by incorporating small periodic structure into the conventional alignment mark, the reflected diffraction efficiency was improved at the respective order. The experimental works were performed for 90 nm and 0.11 µm processes. It is demonstrated that overlay as low as 9 nm was achieved when 5th order mark was used for the 90 nm technology node front-end-of-line (FEOL) process. Narrow marks for backend-end-of-line (BEOL) process also showed compatible results with the lowest overlay of 10 nm. _____________________________________________________________________________________________ v of this work. In addition, the experiments would not be possible without the technical support from ASM Lithography, Mr. Lim Ser Yong and Mr. Alex Chew. To all my peers in Chartered Special Project (SP) group, in particular Clark, Timonthy, Caroline, Jia Mei, Suey Li, Gek Soon and Alan, I thoroughly enjoyed the time that we had spent in the SP room. I think the feeling is mutual. Thank you for making my student days in Chartered a memorable one. I would also like to thank Jone for her generous help to proofread all the chapters in this thesis. Last but not least, I would like to thank my parents for their everlasting and unconditional support throughout my graduate studies. Their caring has motivated me to enjoy every second in my daily life, even during the most difficult times of my research work. Table of Contents _____________________________________________________________________________________________

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<title>Overlay performance on tungsten CMP layers using the ATHENA alignment system</title>

Cited by 8 publications

References 0 publications

Evaluation of alignment marks using ASML ATHENA alignment system in 90-nm BEOL process

Evaluation of alignment marks using ASML ATHENA alignment system in 90-nm BEOL process

Frame generation methodology in mask tape-out flow and automation application

Electromagnetic ray tracing model for line structures and characterization of advanced alignment marks in photolithography

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