Low-Voltage Back-Gated Atmospheric Pressure Chemical Vapor Deposition Based Graphene-Striped Channel Transistor with High-κ Dielectric Showing Room-Temperature Mobility > 11 000 cm²/V·s

Abstract

Utilization of graphene may help realize innovative low-power replacements for III-V materials based high electron mobility transistors while extending operational frequencies closer to the THz regime for superior wireless communications, imaging, and other novel applications. Device architectures explored to date suffer a fundamental performance roadblock due to lack of compatible deposition techniques for nanometer-scale dielectrics required to efficiently modulate graphene transconductance (gm) while maintaining low gate capacitance-voltage product (CgsVgs). Here we show integration of a scaled (10 nm) high-κ gate dielectric aluminum oxide (Al2O3) with an atmospheric pressure chemical vapor deposition (APCVD)-derived graphene channel composed of multiple 0.25 μm stripes to repeatedly realize room-temperature mobility of 11,000 cm(2)/V·s or higher. This high performance is attributed to the APCVD graphene growth quality, excellent interfacial properties of the gate dielectric, conductivity enhancement in the graphene stripes due to low tox/Wgraphene ratio, and scaled high-κ dielectric gate modulation of carrier density allowing full actuation of the device with only ±1 V applied bias. The superior drive current and conductance at Vdd = 1 V compared to other top-gated devices requiring undesirable seed (such as aluminum and poly vinyl alcohol)-assisted dielectric deposition, bottom gate devices requiring excessive gate voltage for actuation, or monolithic (nonstriped) channels suggest that this facile transistor structure provides critical insight toward future device design and process integration to maximize CVD-based graphene transistor performance.

S3-P6: A generalized model for characteristics of graphene FETs in various gate biasing configurations with mobility up to 24000 cm²/vs

“…The I D -V BG plot is symmetric and the transconductance g m is in agreement with experimental data (Fig. 3a-b) The third device (back-gated) with µ > 11,000 cm 2 /Vs [8] has I-V changed from linear to nonlinear characteristics without saturation (Fig. 4a) as V BG increases.…”

“…The estimation for field-effect mobility can be based on µ=(L/WC TG )dG/dV TG where G is the drain conductance. The model equation will generate I-V characteristics with µ from 1500 to 23,600 cm 2 /Vs from four experimental devices [6][7][8][9]. For the first device [6], the model yields R C =700 Ω and values of µ=510 to 1500 cm 2 /Vs (Table 1) in agreement with experimental data [6].…”

“…4b). The peak value of / D m g I also surpasses that of the best top-gated device while keeping high I ON /I OFF ratio [8]. The combined gate width of 4x250 nm allows high drain-current density >250 µA/µm at V DS =-1.5 V (Fig.…”

“…Moreover, it is patterned into narrow stripes of less than 250 nm width that reduce channel resistance and enhance the conductivity [8] up to 40% and I ON /I OFF 3.75 (extracted from Fig. 4b).…”

“…applied to experiment [7]. c) Back-gate with graphene-stripe bilayer (top view) applied to experiment [8]. d) Top-gate and back-gate capacitances circuit diagram.…”