Low Thermal Boundary Resistance Interfaces for GaN-on-Diamond Devices

Yates, Luke; Anderson, Jonathan; Gu, Xing; Lee, Cathy; Bai, Tingyu; Mecklenburg, Matthew; Aoki, Toshihiro; Goorsky, Mark S.; Kuball, Martin; Piner, Edwin L.; Graham, Samuel

doi:10.1021/acsami.8b07014

Cited by 114 publications

(90 citation statements)

References 52 publications

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“…In Figure , the interface is smooth and the elements are distributed an orderly transition. It was also found through high‐resolution imaging and EDS analysis that a relatively smooth and ordered elemental transition happens throughout the interlayer, thereby reducing disorder and enhancing phonon transport across the interface . In addition, because there are a small mismatch of lattice constant as well as thermal expansion coefficient between SiC(4.8 × 10 −6 /°C) and GaN(5.6 × 10 −6 /°C), SiC and the diamond film can form strong chemical bonding, which could contribute to a good adhesion of the deposited diamond on the GaN substrate finally.…”

Section: Resultsmentioning

confidence: 99%

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The influence of dielectric layer on the thermal boundary resistance of GaN‐on‐diamond substrate

Xin

Wei

Kong³

et al. 2019

Surface & Interface Analysis

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The cooling behavior of GaN‐on‐diamond substrate can be enhanced by reducing the thermal boundary resistance (TBR), which is mainly determined by the nature of interlayer. Although SiN film is considered as the primary candidate of dielectric layer, it is still needed to be optimized. In order to facilitate the understanding of the influence of dielectric layer on the TBR of GaN‐on‐Diamond substrate, aluminum nitride (AlN), and silicon nitride (SiN) film were compared systematically, both of which are 100 nm. The time‐domain thermoreflectance (TDTR) measurements, adhesion evaluation, and microstructural analysis methods were adopted to analyse these two interlayers. The results show the TBR of SiN interlayer is as low as 38.5 ± 2.4 m2K GW−1, comparing with the value of 56.4 ± 5.5 m2K GW−1 for AlN interlayer. The difference of TBR between these two interlayers is elucidated by the diamond nucleation density, and the adhesion between the diamond film and GaN substrate, both of which are affected by the surface charge and chemical groups of the dielectric layer.

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Section: Resultsmentioning

confidence: 99%

“…It was also found through high-resolution imaging and EDS analysis that a relatively smooth and ordered elemental transition happens throughout the interlayer, thereby reducing disorder and enhancing phonon transport across the interface. 40 Si-C bonding during diamond nucleation is also beneficial to the strong film adhesion and low TBR.…”

Section: Methodsmentioning

confidence: 99%

The influence of dielectric layer on the thermal boundary resistance of GaN‐on‐diamond substrate

Xin

Wei

Kong³

et al. 2019

Surface & Interface Analysis

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“…Therefore, the TBC of bonded GaN-diamond interfaces still have the potential to be improved by using other interfacial layers such as SiC, AlN, or SiNx, even though our measured TBC for Samp2 is already among the high TBC for GaN-diamond interfaces. 6,40 To help elucidate the measured TBC and its relationship to the sample architecture, high-resolution scanning transmission electron microscopy (HR-STEM) and electron energy loss spectroscopy (EELS) are used to study the structure of the GaN-diamond interfaces. As shown in Figure 3 Additionally, high-resolution EELS analysis is used to study the chemical composition at the interfaces.…”

Section: Four-phonon Scattering Process Which Is Not Included In the mentioning

confidence: 99%

“…2,3 Diamond has the highest thermal conductivity among natural materials and is of interest for integration with GaN to help dissipate the generated heat from the channel of GaN-based HEMTs. 2,[4][5][6] Current techniques involve two ways to integrate GaN with diamond. One is direct growth of chemical vapor deposited (CVD) diamond on GaN with a transition layer of dielectric material.…”

Section: Introductionmentioning

confidence: 99%

Interfacial Thermal Conductance across Room-Temperature-Bonded GaN/Diamond Interfaces for GaN-on-Diamond Devices

Cheng

Yates

et al. 2020

ACS Appl. Mater. Interfaces

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137

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The wide bandgap, high-breakdown electric field, and high carrier mobility makes GaN an ideal material for high-power and high-frequency electronics applications such as wireless communication and radar systems. However, the performance and reliability of GaN-based high electron mobility transistors (HEMTs) are limited by the high channel temperature induced by Joule-heating in the device channel. High thermal conductivity substrates (e.g., diamond) integrated with GaN can improve the extraction of heat from GaN-based HEMTs and lower the device operating temperature. However, heterogeneous integration of GaN with diamond substrates is not trivial and presents technical challenges to maximize the heat dissipation potential brought by the diamond substrate. In this work, two modified room-temperature surface-activated bonding (SAB) techniques are used to bond GaN and single crystal diamond with different interlayer thicknesses. Time-domain thermoreflectance (TDTR) is used to measure the thermal properties from room temperature to 480 K. A relatively large thermal boundary conductance (TBC) of the GaN-diamond interfaces with a ~4-nm interlayer (~90 MW/m 2 -K) was observed and material characterization was performed to link the structure of the interface to the TBC. Device modeling shows that the measured GaN-diamond TBC values obtained from bonding can enable high power GaN devices by taking the full advantage of the high thermal conductivity of single crystal diamond and achieve excellent cooling effect. Furthermore, the room-temperature bonding process in this work do not induce stress problem due to different coefficient of thermal expansion in other high temperature integration processes in previous studies. Our work sheds light on the potential for room-temperature heterogeneous integration of semiconductors with diamond for applications of electronics cooling especially for GaN-on-diamond devices.

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“…Thus, the stress relaxation of the buffer layer would cause a wafer bowing, which will lower the thickness of the GaN epitaxy layers [22]. In addition, the large thermal boundary resistance (GaN with substrate) has a serious influence on device performance for the GaN devices working at high power density [23].…”

Section: Vertical Gan-based Devices On the Fs-substratementioning

confidence: 99%

Review of Recent Progress on Vertical GaN-Based PN Diodes

Younis

Chiu

et al. 2021

Nanoscale Res Lett

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As a representative wide bandgap semiconductor material, gallium nitride (GaN) has attracted increasing attention because of its superior material properties (e.g., high electron mobility, high electron saturation velocity, and critical electric field). Vertical GaN devices have been investigated, are regarded as one of the most promising candidates for power electronics application, and are characterized by the capacity for high voltage, high current, and high breakdown voltage. Among those devices, vertical GaN-based PN junction diode (PND) has been considerably investigated and shows great performance progress on the basis of high epitaxy quality and device structure design. However, its device epitaxy quality requires further improvement. In terms of device electric performance, the electrical field crowding effect at the device edge is an urgent issue, which results in premature breakdown and limits the releasing superiorities of the GaN material, but is currently alleviated by edge termination. This review emphasizes the advances in material epitaxial growth and edge terminal techniques, followed by the exploration of the current GaN developments and potential advantages over silicon carbon (SiC) for materials and devices, the differences between GaN Schottky barrier diodes (SBDs) and PNDs as regards mechanisms and features, and the advantages of vertical devices over their lateral counterparts. Then, the review provides an outlook and reveals the design trend of vertical GaN PND utilized for a power system, including with an inchoate vertical GaN PND.

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Low Thermal Boundary Resistance Interfaces for GaN-on-Diamond Devices

Cited by 114 publications

References 52 publications

The influence of dielectric layer on the thermal boundary resistance of GaN‐on‐diamond substrate

The influence of dielectric layer on the thermal boundary resistance of GaN‐on‐diamond substrate

Interfacial Thermal Conductance across Room-Temperature-Bonded GaN/Diamond Interfaces for GaN-on-Diamond Devices

Review of Recent Progress on Vertical GaN-Based PN Diodes

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