Low temperature Si homo-epitaxy by reduced pressure chemical vapor deposition using dichlorosilane, silane and trisilane

Epitaxial growth of Si and SiGe at temperatures lower than 500°C with disilane and germane

“…They are most likely the signature of crystalline imperfections in those Si layers which could be due to (i) insufficient Si adatom diffusion lengths, (ii) particle formation in the gaseous phase for really high Si 2 H 6 partial pressures, (iii) surfaces which are at really low temperatures more sensitive to O and/or C contamination or (iv) more likely, a combination of hypothesis (i) to (iii). Vincent et al have also observed those kinds of defects when growing below 500°C Si layers with a trisilane-based chemistry [19]. These defects would not be due to a contamination of the SiGe starting surface they used but rather to punctual defects that appear at low epitaxial temperature.…”

Si passivation for Ge pMOSFETs: Impact of Si cap growth conditions

“…Different Si precursors have been used for Si cap growth: DiChloroSilane (DCS), silane and trisilane. Each precursor has a minimal temperature at which Si can be grown as detailed in [14]: 650°C for DCS, 500°C for silane, 350°C for trisilane, respectively. Only low Si cap growth temperatures have been investigated in order to avoid Ge thermal up-diffusion in Si caps.…”

“…Low temperatures (350-500°C) Si homoepitaxy using trisilane has been recently reported as process with high defectivity [14]. Specific structures have been defined for Photoluminescence (PL) measurements using the following stack: Si cap/SiGe/Si seed layer/Si substrates.…”

Biaxial and Uniaxial Compressive Stress Implemented in Ge(Sn) pMOSFET Channels by Advanced Reduced Pressure Chemical Vapor Deposition Developments

“…Both H 2 and N 2 have been used as carrier gas. The use of N 2 generally permits to slightly enhance growth rate (19) at low temperatures. This is of high interests since ~300nm deep trenches need to be filled with SiGe with a decent deposition time required.…”