Low Temperature Ni-Al Ohmic Contacts to p-Type 4H-SiC Using Semi-Salicide Processing

Ekström, Mattias; Hou, Shuo; Elahipanah, Hossein; Salemi, Arash; Östling, Mikael; Zetterling, Carl-Mikael

doi:10.4028/www.scientific.net/msf.924.389

Cited by 10 publications

(6 citation statements)

References 15 publications

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“…The resistance of the ptype contacts decreased by higher SSA temperature, but it was still partially rectifying even at 1000 C. Even if the contacts become ohmic at a higher annealing temperature, the process is unlikely to be competitive with already established contact processes. 3,[28][29][30] As such, it was found that the selfaligned CoSi x is a poor candidate for low resistance ohmic contacts to p-type 4H-SiC. It is interesting to compare the result to that achieved by Lundberg and Ö stling.…”

Section: Electrical Characterizationmentioning

confidence: 95%

“…An example of such a study was the finding that the self-aligned Ni 2 Si can be turned from rectifying to ohmic to p-type 4H-SiC by alloying it with aluminum at relatively low temperatures. 3 A comparison between self-aligned nickel silicide and lift-off process for power devices was recently presented by Sledziewski at the conference of silicon carbide and related materials (ECSCRM 2018). Nickel-based contact processes give good ohmic contacts to ntype 4H-SiC, 2,4,5 but often gives rectifying contacts to p-type, with some notable exceptions.…”

Section: Introductionmentioning

confidence: 99%

“…26,27 The annealing temperature range was limited in this study up to 1000 C. It was considered that any contact process requiring higher annealing temperatures than 1000 C would not be competitive with already established contact processes. 2,3,[21][22][23][28][29][30] Higher anneal temperatures could potentially degrade other device related properties, like the silicon dioxide (SiO 2 )/4H-SiC interface of metal oxide semiconductor field-effect transistors (MOSFETs).…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide

Ekström

Ferrario

Zetterling

2019

Journal of Elec Materi

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Section: Electrical Characterizationmentioning

confidence: 95%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide

Ekström

Ferrario

Zetterling

2019

Journal of Elec Materi

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“…The n-type ohmic contact was made by a Ni-based selfaligned two-step-annealing process [30]. The p-type Ohmic contact was made by a Ni-Al-based semi-self-aligned process [31]. The interconnect dielectric was PECVD oxide and the interconnect metal was sputtered TiW and Al.…”

Section: Design and Fabricationmentioning

confidence: 99%

A Silicon Carbide 256 Pixel UV Image Sensor Array Operating at 400 °C

Hou

Shakir

Hellström

et al. 2020

IEEE J. Electron Devices Soc.

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An image sensor based on wide band gap silicon carbide (SiC) has the merits of high temperature operation and ultraviolet (UV) detection. To realize a SiC-based image sensor the challenge of opto-electronic on-chip integration of SiC photodetectors and digital electronic circuits must be addressed. Here, we demonstrate a novel SiC image sensor based on our in-house bipolar technology. The sensing part has 256 (16×16) pixels. The digital circuit part for row and column selection contains two 4-to-16 decoders and one 8-bit counter. The digital circuits are designed in transistor-transistor logic (TTL). The entire circuit has 1959 transistors. It is the first demonstration of SiC opto-electronic on-chip integration. The function of the image sensor up to 400 • C has been verified by taking photos of the spatial patterns masked from UV light. The image sensor would play a significant role in UV photography, which has important applications in astronomy, clinics, combustion detection and art. INDEX TERMS Silicon carbide (SiC), image sensor, ultraviolet (UV), photodiode, high temperature, bipolar junction transistor (BJT), transistor-transistor logic (TTL).

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“…As a result, a borderless contact (BLC) structure was adopted. BLC nitride was used as an etch stop layer and cobalt (Co) silicide [1] was applied to the salicide process [2].…”

Section: Introductionmentioning

confidence: 99%

Effect of Contact Plug Deposition Conditions on Junction Leakage and Contact Resistance in Multilevel CMOS Logic Interconnection Device

et al. 2020

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Here, we developed the optimal conditions in terms of physical and electrical characteristics of the barrier and tungsten (W) deposition process of a contact module, which is the segment connecting the device and the multi-layer metallization (MLM) metal line in the development of 100 nm-class logic devices. To confirm its applicability to the logic contact of barrier and W films, a contact hole was formed, first to check the bottom coverage and the filling status of each film, then to check the electrical resistance and leakage characteristics to analyze the optimal conditions. At an aspect ratio of 3.89:1, ionized metal plasma (IMP) Ti had a bottom coverage of 40.9% and chemical vapor deposition (CVD) titanium nitride (TiN) of 76.2%, confirming that it was possible to apply the process to 100 nm logic contacts. W filling was confirmed, and a salicide etching rate (using Radio Frequency (RF) etch) of 13–18 Å/s at a 3.53:1 aspect ratio was applied. The etching rate on the thermal oxide plate was 9 Å/s. As the RF etch amount increased from 50–100 Å, the P active resistance increased by 0.5–1 Ω. The resistance also increased as the amount of IMP Ti deposition increased to 300 Å. A measurement of the borderless contact junction leakage current indicated that the current in the P + N well increased by more than an order of magnitude when IMP Ti 250 Å or more was deposited. The contact resistance value was 0.5 Ω. An AC bias improved the IMP Ti deposition rate by 10% in bottom coverage, but there was no significant difference in contact resistance. In the case of applying IMP TiN, the overall contact resistance decreased to 2 Ω compared to CVD TiN, but the distribution characteristics were poor. The best results were obtained under the conditions of RF etch 50 Å, IMP Ti 200 Å, and CVD TiN 2 × 50 Å.

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Low Temperature Ni-Al Ohmic Contacts to p-Type 4H-SiC Using Semi-Salicide Processing

Cited by 10 publications

References 15 publications

Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide

Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide

A Silicon Carbide 256 Pixel UV Image Sensor Array Operating at 400 °C

Effect of Contact Plug Deposition Conditions on Junction Leakage and Contact Resistance in Multilevel CMOS Logic Interconnection Device

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