Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

Abstract

Effective mobility measurements have been made at 4.2 K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO 2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Characterization of Local Structures in Plasma Deposited Semiconductors by X-ray Absorption Spectroscopy

“…Since the possible inclusion of Ge in future CMOS devices due to promising results in increasing the channel mobility, characterization of Hfbased oxides on germanium are attracting interests of researchers [32,33]. In both cases (silicon and germanium substrates) the detailed local structural information around the Hf atom has crucial value in terms of further process development using these exciting new structures.…”

Field effect transistor with thin AlOxNy film as gate dielectric

“…The basic version of this method is useful for estimating the flat-band voltage of MIS systems, the threshold voltage of MISFETs and the density of surface traps (Groeseneken et al , 1984; Van Overstraeten et al , 1975); however, a slightly modified version allows to determine the energy distribution of surface traps (Tseng, 1987; Głuszko et al , 2007). CP works well when testing dielectrics with a high dielectric constant (Crupi et al , 2006; Lu et al , 2006; Beer et al , 2007; Firek et al , 2014) and devices such as vertical MISFETs or fabricated on silicon-on-insulator substrates (Głuszko et al , 2007; Wouters et al , 1989; Głuszko et al , 2008). Moreover, this method was used for testing surface traps related to a specific defect (Groeseneken et al , 1996) as well as when assessing the degradation and aging of MIS structures (Lee et al , 1996).…”

High-k Gated Germanium Metal-Oxide-Semiconductor Capacitors with GeO₂ Surface Passivation and Fluorine Incorporation

“…Forming gas annealing (FGA) may be one choice. However, some studies report that FGA can reduce the interface states for Ge [7] whereas other studies suggest that passivation of Ge dangling bonds by hydrogen is ineffective [8]. Moreover, though the pre-gate surface passivation treatments can offer a good interface quality, due to the lower processing temperature for Ge devices, there are still significant bulk defects in high-k dielectrics, especially near high-k/Ge interface (usually a PDA of ~700 o C is used to repair these defects for high-k/Si stack) and these defects may be the cause for mobility degradation and bias temperature instability.…”