Low-temperature grown GaAs insulators for GaAs FET applications

Abstract

Low-temperature (LT) grown GaAs in either an as-grown or annealed condition has been used as a gate dielectric for GaAs field effect transistors (FET). It was found that both types of LT GaAs layers can effectively passivate the device surface states, eliminate hysteresis and light induced effects, and dramatically increase the breakdown voltage, V BD , between source and drain contacts of the FETs. V BD was found to increase on cooling the as-grown LT GaAs FET with a low activation energy, typically ∼ 0.15 eV for the corresponding reverse bias gate current. However, for the annealed LT GaAs FET, V BD decreased with decreasing temperature and the fixed reverse bias gate current showed a large activation energy ∼ 0.5 eV. A large gate-lag and kink effect was observed from the annealed LT GaAs FETs, but was insignificant for the as-grown LT GaAs FETs. The superior performance of the as-grown LT GaAs FETs is attributed to the high degree of hopping conductivity found, and the high breakdown characteristic of the as-grown LT GaAs. The high density of defects and the trap-like nature of the As/GaAs clusters in annealed LT GaAs layer are believed to be responsible for the transient behaviour and large values of activation energy found in the annealed LT GaAs FETs.