Low-temperature buffer AlInAs/GaInAs on InP HEMT technology for ultra-high-speed integrated circuits

Brown, April S.; Chou, C.S.; Delaney, M.J.; Hooper, C.; Jensen, J.F.; Larson, L.E.; Mishra, Umesh K.; Nguyen, L.D.; Thompson, Michael

doi:10.1109/gaas.1989.69313

Cited by 11 publications

(2 citation statements)

References 5 publications

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“…The leakage mechanism is also contributed by the buffer layer; hence, one of the methods for buffer layer optimization is by using low temperature (LT) buffers. The LT buffer gives high resistivity [25][26][27][28] and reduces the injection of electrons from the channel into the buffer and substrate, and undesirable electron flow from source to drain in the buffer and substrate. As these electrons in the buffer and substrate are far from the gate, where the gate modulation is inefficient, the reduction of these leakages through the buffer and substrate lowers the excess in drain current and suppresses the reverse gate leakage current, and it also increases the V BR [27,29].…”

Section: Direct Current (Dc) Characteristicsmentioning

confidence: 99%

“…The holes that are generated from impact ionization can create a leakage path inside the buffer; hence, these holes have a positive fixed charge which enhances the injection of hot electrons to the channel and buffer and increases the reverse gate leakage current [27,30]. The high resistivity of the LT buffer also helps to make the electrons from source to drain more confined in the channel layer [31] and reduces leakage to the buffer.…”

Section: Direct Current (Dc) Characteristicsmentioning

confidence: 99%

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New Submicron Low Gate Leakage In0.52Al0.48As-In0.7Ga0.3As pHEMT for Low-Noise Applications

et al. 2021

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Conventional pseudomorphic high electron mobility transistor (pHEMTs) with lattice-matched InGaAs/InAlAs/InP structures exhibit high mobility and saturation velocity and are hence attractive for the fabrication of three-terminal low-noise and high-frequency devices, which operate at room temperature. The major drawbacks of conventional pHEMT devices are the very low breakdown voltage (<2 V) and the very high gate leakage current (∼1 mA/mm), which degrade device and performance especially in monolithic microwave integrated circuits low-noise amplifiers (MMIC LNAs). These drawbacks are caused by the impact ionization in the low band gap, i.e., the InxGa(1−x)As (x = 0.53 or 0.7) channel material plus the contribution of other parts of the epitaxial structure. The capability to achieve higher frequency operation is also hindered in conventional InGaAs/InAlAs/InP pHEMTs, due to the standard 1 μm flat gate length technology used. A key challenge in solving these issues is the optimization of the InGaAs/InAlAs epilayer structure through band gap engineering. A related challenge is the fabrication of submicron gate length devices using I-line optical lithography, which is more cost-effective, compared to the use of e-Beam lithography. The main goal for this research involves a radical departure from the conventional InGaAs/InAlAs/InP pHEMT structures by designing new and advanced epilayer structures, which significantly improves the performance of conventional low-noise pHEMT devices and at the same time preserves the radio frequency (RF) characteristics. The optimization of the submicron T-gate length process is performed by introducing a new technique to further scale down the bottom gate opening. The outstanding achievements of the new design approach are 90% less gate current leakage and 70% improvement in breakdown voltage, compared with the conventional design. Furthermore, the submicron T-gate length process also shows an increase of about 58% and 33% in fT and fmax, respectively, compared to the conventional 1 μm gate length process. Consequently, the remarkable performance of this new design structure, together with a submicron gate length facilitatesthe implementation of excellent low-noise applications.

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Section: Direct Current (Dc) Characteristicsmentioning

confidence: 99%

Section: Direct Current (Dc) Characteristicsmentioning

confidence: 99%

New Submicron Low Gate Leakage In0.52Al0.48As-In0.7Ga0.3As pHEMT for Low-Noise Applications

et al. 2021

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Mesa-sidewall gate leakage in InAlAs/InGaAs heterostructure field-effect transistors

Bahl

Leary

Alamo

1992

IEEE Trans. Electron Devices

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Abstract-InAIAslInGaAs HFET's fabricated by conventional mesa isolation have a potential parasitic gate-leakage path where the gate metallization overlaps the exposed channel edge at the mesa sidewall. We have unmistakably proven the existence of this path by fabricating special heterojunction diodes with different mesa-sidewall gate-metal overlap lengths. We find that sidewall leakage is a function of the crystallographic orientation of the sidewall, and increases with channel thickness, sidewall overlap area, and InAs mole fraction in the channel. In HFET's fabricated alongside the diodes, sidewall leakage increased the subthreshold and forward gate leakage currents, and reduced the breakdown voltage. Fabrication of these HFET's by conventional mesa isolation, however, results in sidewalls where the InGaAs channel is exposed and comes in contact with the gate metallization running up the mesa (Fig. 1). Even though the sidewall contact area can easily be several orders of magnitude smaller than the gate area, the low Schottkybarrier height of metals with Ino,5,Gao,47As (0.2 eV) [6] potentially results in a significant leakage path from the gate to the channel. In AlGaAs/GaAs HFET's, mesasidewall gate leakage, or sidewall leakage for short,

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Off-state breakdown in InAlAs/InGaAs MODFET's

Bahl

Alamo

Dickmann

et al. 1995

IEEE Trans. Electron Devices

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Low-temperature buffer AlInAs/GaInAs on InP HEMT technology for ultra-high-speed integrated circuits

Cited by 11 publications

References 5 publications

New Submicron Low Gate Leakage In0.52Al0.48As-In0.7Ga0.3As pHEMT for Low-Noise Applications

New Submicron Low Gate Leakage In0.52Al0.48As-In0.7Ga0.3As pHEMT for Low-Noise Applications

Mesa-sidewall gate leakage in InAlAs/InGaAs heterostructure field-effect transistors

Off-state breakdown in InAlAs/InGaAs MODFET's

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