2003
DOI: 10.1063/1.1612904
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Low-temperature atomic-layer-deposition lift-off method for microelectronic and nanoelectronic applications

Abstract: We report a novel method for depositing patterned dielectric layers with submicron features using atomic layer deposition (ALD). The patterned films are superior to sputtered or evaporated films in continuity, smoothness, conformality, and minimum feature size. Films were deposited at 100-150 C using several different precursors and patterned using either PMMA or photoresist. The low deposition temperature permits uniform film growth without significant outgassing or hardbaking of resist layers. A liftoff tech… Show more

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Cited by 181 publications
(154 citation statements)
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“…In Fig.1, we first show the electrical properties of a back-gated (t SiO2 =10nm, Fig. 1a) semiconducting SWNT (d~1.4 to 1.5 nm, channel length L~150 nm between Pd source/drain S/D) device before and after K-doping (details of doping described previously [16][17][18] 10,14,15 The nanotube segments outside the gate stack are fully exposed for K vapor doping to form n + regions (Fig.2a). ALD of HfO 2 on SWNTs provides excellent electrostatic modulation of the channel conductance without degrading the transport property of the 1D nanotube channels.…”
mentioning
confidence: 99%
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“…In Fig.1, we first show the electrical properties of a back-gated (t SiO2 =10nm, Fig. 1a) semiconducting SWNT (d~1.4 to 1.5 nm, channel length L~150 nm between Pd source/drain S/D) device before and after K-doping (details of doping described previously [16][17][18] 10,14,15 The nanotube segments outside the gate stack are fully exposed for K vapor doping to form n + regions (Fig.2a). ALD of HfO 2 on SWNTs provides excellent electrostatic modulation of the channel conductance without degrading the transport property of the 1D nanotube channels.…”
mentioning
confidence: 99%
“…technique. 10,14,15 The nanotube segments outside the gate stack are fully exposed for K vapor doping to form n + regions (Fig.2a). ALD of HfO 2 on SWNTs provides excellent electrostatic modulation of the channel conductance without degrading the transport property of the 1D nanotube channels.…”
mentioning
confidence: 99%
“…Another important consideration is that the capacitor should have a high breakdown field E BD (= V BD /d, where V BD is the breakdown gate voltage), allowing for the application of a large V G across the capacitor to obtain a large ∆n s . Dielectric layers obtained by atomic layer deposition (ALD) are known to have a high E BD [22]. In particular, if 50-nm-thick HfO 2 (k ∼ 20) dielectric layer is adopted and 10 V of V G (electric field of 0.2 V/nm) is applied, ∆n s ∼ 2×10 13 cm −2 .…”
Section: Introductionmentioning
confidence: 99%
“…A possibility to achieve area-selective deposition by ALD is by tailoring the surface properties prior to growth as ALD processes rely critically on surface reactions. Previously, several areaselective ALD approaches based on masking designated areas by resist films 11 or self-assembled monolayers 12 using top-down patterning techniques have been investigated, but to date only the fabrication of structures with micrometer dimensions have been demonstrated by these approaches.…”
mentioning
confidence: 99%