Low temperature (800°C) recessed junction selective silicon-germanium source/drain technology for sub-70 nm CMOS

Gannavaram, S.; Pesovic, N.; Öztürk, Cem

doi:10.1109/iedm.2000.904350

Cited by 62 publications

(45 citation statements)

References 3 publications

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“…This interpretation is supported, although somewhat indirectly, by reports of enhanced activation of B in Si driven by compressive strain. 16,17 In this case, where the lattice strain field is compressive and the local strain field around the relatively small substitutional B atom is tensile, B activation is seen to be increased. This increase is attributed to a compensation effect between the two strain fields, favoring substitutional incorporation of B.…”

Section: Fig 3 Sims and Differentialmentioning

confidence: 99%

Highly conductive Sb-doped layers in strained Si

Bennett

Cowern

Smith

et al. 2006

Applied Physics Letters

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The ability to create stable, highly conductive ultrashallow doped regions is a key requirement for future silicon-based devices. It is shown that biaxial tensile strain reduces the sheet resistance of highly doped n-type layers created by Sb or As implantation. The improvement is stronger with Sb, leading to a reversal in the relative doping efficiency of these n-type impurities. For Sb, the primary effect is a strong enhancement of activation as a function of tensile strain. At low processing temperatures, 0.7% strain more than doubles Sb activation, while enabling the formation of stable, ϳ10-nm-deep junctions. This makes Sb an interesting alternative to As for ultrashallow junctions in strain-engineered complementary metal-oxide-semiconductor devices.

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Section: Fig 3 Sims and Differentialmentioning

confidence: 99%

Highly conductive Sb-doped layers in strained Si

Bennett

Cowern

Smith

et al. 2006

Applied Physics Letters

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“…It has also benchmarked an area in strain engineering where bandgap tailoring is essential for the mobility enhancement (4)(5)(6). Tremendous experimental results have been presented on the growth and integration of SiGe layers for different applications, meanwhile, remarkably fewer reports are available about the modeling of the growth (7)(8)(9).…”

Section: Introductionmentioning

confidence: 99%

Kinetic Model of SiGe Selective Epitaxial Growth using RPCVD Technique

Kolahdouz

Maresca

Ghandi

et al. 2011

J. Electrochem. Soc.

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Recently, selective epitaxial growth (SEG) of B-doped SiGe layers has been used in recessed source/drain (S/D) of pMOSFETs. The uniaxial induced strain enhances the carrier mobility in the channel. In this work, a detailed model for SEG of SiGe has been developed to predict the growth rate and Ge content of layers in dichlorosilane(DCS)-based epitaxy using a reduced-pressure CVD reactor. The model considers each gas precursor contributions from the gas-phase and the surface. The gas flow and temperature distribution were simulated in the CVD reactor and the results were exerted as input parameters for Maxwell energy distribution. The diffusion of molecules from the gas boundaries was calculated by Fick's law and Langmuir isotherm theory (in non-equilibrium case) was applied to analyze the surface. The pattern dependency of the selective growth was also modeled through an interaction theory between different subdivisions of the chips. Overall, a good agreement between the kinetic model and the experimental data were obtained.

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“…FinFETs designed with s/σ < 2.5 perform worse than devices with abrupt SDE regions because a large d at lower σ causes dopant spill into the channel, leading to lower A VO and f T . Since the value of d depends on thermal budget and diffusivity, very small values (< 3 nm/dec) may be difficult to achieve (very small values of d require a nonstandard process [19], [20] such as solid phase epitaxy or laser thermal annealing), as it may ultimately require control of individual atoms. Therefore, it is more appropriate to increase s to achieve higher s/σ values.…”

Section: Optimization Of Analog Fommentioning

confidence: 99%