2011
DOI: 10.1109/jmems.2011.2111355
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Low-Stress CMOS-Compatible Silicon Carbide Surface-Micromachining Technology—Part I: Process Development and Characterization

Abstract: A low-temperature (< 300 • C) low-stress microelectromechanical systems fabrication process based on a silicon carbide structural layer is presented. A partially conductive sintered target enables low-temperature dc sputtering of amorphous silicon carbide (SiC) at high deposition rates (75 nm/min). The low stress of the structural film allows for mechanically reliable structures to be fabricated, while the low-temperature deposition allows for pre-SiC metallization. The process is designed for low-cost film de… Show more

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Cited by 31 publications
(34 citation statements)
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References 50 publications
(50 reference statements)
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“…As shown by (10), the intrinsic stresses in the films that compose the beam can cause axial forces on the beam that shift its resonant frequency. Therefore, the processing technology used for fabrication minimizes the structural axial stress such that its impact on the operation of the devices is not significant [17].…”
Section: A Operating Principlementioning
confidence: 99%
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“…As shown by (10), the intrinsic stresses in the films that compose the beam can cause axial forces on the beam that shift its resonant frequency. Therefore, the processing technology used for fabrication minimizes the structural axial stress such that its impact on the operation of the devices is not significant [17].…”
Section: A Operating Principlementioning
confidence: 99%
“…Integrated heaters can be added to the structure with another aluminum layer above the SiC. The fabrication process is detailed in [17].…”
Section: B Mechanical Designmentioning
confidence: 99%
See 2 more Smart Citations
“…Alternatively, it is also capable of operating at resonance under vacuum for enhanced sensitivity. The device is fabricated using a silicon carbide (SiC) surface micromachining technology as in [6][7][8], which is fully adapted for above-IC integration on standard CMOS substrates. This paper first describes the device design, and then presents finite-elements simulation results.…”
mentioning
confidence: 99%