Low resistivity contact on n-type Ge using low work-function Yb with a thin TiO2 interfacial layer

Abstract

This work demonstrates the benefit of a lower contact barrier height, and hence reduced contact resistivity (ρc), using a low work-function metal (Yb) in unpinned metal-interfacial layer-semiconductor (MIS) contacts on n-type Ge. Fermi-level unpinning in MIS contacts on n-Ge is first established by introducing a 2 nm TiO2−x interfacial layer between various contact metals (Yb, Ti, Ni, Pt) and n-Ge. Further, Yb/TiO2−x/n-Ge MIS contact diodes exhibit higher current densities (up to 100×) and lower effective contact barrier height (up to 30%) versus Ti/TiO2−x control devices over a wide range of TiO2−x thickness (1–5 nm). Finally, low work-function Yb combined with doped TiO2−x having a low conduction band offset with Ge and high substrate doping (n+-Ge: 2.5×1019 cm−3) is shown to result in an ultra-low ρc value of 1.4 × 10−8 Ω cm2, 10 × lower than Ti/TiO2−x control devices.

Schottky Barrier Height Engineering for Electrical Contacts of Multilayered MoS2 Transistors with Reduction of Metal-Induced Gap States

“…Mechanism of SBH Control: Fermi-Level Unpinning by MIGS Reduction. The SBH control by insertion of the interlayer can be explained by three mechanisms: (1) Fermilevel unpinning by the MIGS reduction, [23][24][25][26][27][28][29][30][31][32]35,36 (2) Fermilevel unpinning by the metal/semiconductor interface passivation, 27,28,44 and (3) interface dipole formation. 23,26,33,34,36 First, the two Fermi-level unpinning effects and the interface dipole effect can be separated from the SBH vs contact metal work function plot as shown in Figure 6a.…”

“…These MIGS have been identified as the main cause of the FLP in conventional semiconductor materials. Therefore, a metal–interlayer–semiconductor (MIS) structure has been developed to alleviate the FLP and reduce the electron SBH by reducing the MIGS in Si, , Ge, − and III–V. − Ultrathin interlayers such as TiO 2 − ,,, and ZnO − ,, which exhibit a small conduction band offset (CBO) to semiconductor materials are inserted between the metal contact and the semiconductor as the Fermi-level unpinning layer that minimizes the increase in the interlayer resistance. Several researchers have previously developed the MIS structure for the MoS 2 to control the electron SBH of its electrical contacts by using Ta 2 O 5 , TiO 2 , − MgO, and h -BN , interlayers.…”

Interface Structures and Electrical Properties of Micro-Fabricated Epitaxial Hf-Digermanide/n-Ge(001) Contacts

“…The Ar gas flow rate and pressure during sputtering process were maintained at 30 sccm and 0.12 Pa, respectively. Subsequently, photolithography and chemical selective etching were performed to form squarepattern electrodes with different lengths of a side (7,20,45, and 90 μm). As a reference, a blanket Hf/Ge sample without microfabrication was also prepared.…”

“…In recent years, methods to reduce the SBH have been proposed. One is to insert a dielectric interlayer at the metal/Ge interface, such as Al2O3 [4], Si3N4 [5], TiO2 [6,7], or ZnO [8,9]. Another method involves inserting a group-IV semiconductor or semimetal interlayer, such as Sn [10], Ge1−xSnx [11], or Si1−x−yGexSny [12,13].…”

Growth and Interlayer Engineering of 2D Layered Semiconductors for Future Electronics

“…Interlayer insertion was proposed to suppress MIGS. By inserting materials with a a low conduction band offset compared to semiconductor, such as TiO 2 ,,− and ZnO, − the inserted layer prevents chemical bonding formation at the metal–semiconductor junction. Few-nanometer-thick layers prevent FLP while allowing carrier transport by tunneling.…”