Low-power technology mapping for mixed-swing logic

Abstract

Mixed-swing logic employs multiple power supply rails and device threshold voltages and allows us to create richer cell libraries with a wider range of power/speed tradeoffs. However, mapping onto such a library with a conventional technology mapper will not exploit the full potential of a mixed-swing methodology. To remedy this, we have developed a new technology mapping tool that specifically targets mixedswing logic. Our approach combines (1) efficient clustering and clusterlevel delay budgeting for the uncommitted logic, with (2) an exhaustive search for the optimal cover that is rendered practical by the clustering process. Power savings up to 3X have been demonstrated with our mixedswing solutions versus single power supply implementations.

A Structural Customization Approach for Low Power Embedded Systems Design

“…To find a mapping that will minimize the total power consumption under the delay and cost constraints, is an NP-hard problem. Some heuristic algorithms [6][7] [8] have been proposed to find the optimal mapping for a design.…”