Low-Power, Minimally Invasive Process Compensation Technique for Sub-Micron CMOS Amplifiers

Mukadam, Mustansir; Filho, Oscar Gouveia; Kramer, Nick; Zhang, Xuan; Apsel, Alyssa

doi:10.1109/tvlsi.2012.2232685

Cited by 7 publications

(1 citation statement)

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“…The structure of the LDO can be found in [5]. Furthermore, a digitally controllable bias voltage generator has been designed and presented in Figure 3 [6]. This structure provides all of the required bias voltage levels for VB1 and also VB2 for the different gain modes.…”

Section: Structure Of the Voltage Generatormentioning

confidence: 99%

A Low-Band Multi-Gain LNA Design for Diversity Receive Module with 1.2 dB NF

Rikan

Kim

Choi

et al. 2021

Sensors

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This paper presents and discusses a Low-Band (LB) Low Noise Amplifier (LNA) design for a diversity receive module where the application is for multi-mode cellular handsets. The LB LNA covers the frequency range between 617 MHz to 960 MHz in 5 different frequency bands and a 5 Pole Single Throw (5PST) switch selects the different frequency bands where two of them are for the main and three for the auxiliary bands. The presented structure covers the gain modes from −12 to 18 dB with 6 dB gain steps where each gain mode has a different current consumption. In order to achieve the Noise Figure (NF) specifications in high gain modes, we have adopted a cascode Common-Source (CS) with inductive source degeneration structure for this design. To achieve the S11 parameters and current consumption specifications, the core and cascode transistors for high gain modes (18 dB, 12 dB, and 6 dB) and low gain modes (0 dB, −6 dB, and −12 dB) have been separated. Nevertheless, to keep the area low and keep the phase discontinuity within ±10∘, we have shared the degeneration and load inductors between two cores. To compensate the performance for Process, Voltage, and Temperature (PVT) variations, the structure applies a Low Drop-Out (LDO) regulator and a corner case voltage compensator. The design has been proceeded in a 65-nm RSB process design kit and the supply voltage is 1 V. For 18 dB and −12 dB gain modes as two examples, the NF, current consumption, and Input Third Order Intercept Point (IIP3) values are 1.2 dB and 16 dB, 10.8 mA and 1.2 mA, and −6 dBm and 8 dBm, respectively.

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Section: Structure Of the Voltage Generatormentioning

confidence: 99%