Low power linear current mode imager with 1.5 transistors per pixel

Linear current mode CMOS image sensor that performs spatial convolution during pixel readout using low power analog circuitry is presented. The image sensor has 128 by 109 pixel array, digital scanning registers, pixel selection circuitry, and digitally programmable analog processing unit. An intensity image in parallel with two convolved images is provided outside the chip at 60 frames per second. The image sensor was fabricated in 0.5 micron 3M2P process. The sensor operation and performance measurements are presented.

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“…The pixel is based on the switchless linear current mode paradigm [8], [9]. Schematic diagram of the pixel is shown in Fig.…”

Section: A Pixel Operationmentioning

confidence: 99%

“…The improvements in the FPN and SNR are due to the simplification of the pixel circuitry in the current design. The pixel is based on our switchless paradigm [8], [9], which helps reduce noise and increase spatial sampling. The precision of the analog computation has also been improved in this architecture.…”

Section: Introductionmentioning

confidence: 99%

Linear current mode image sensor with focal plane spatial image processing

Njuguna

Gruev

2010

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

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“…Our computational image sensor is based on a current mode active pixel paradigm [6] and organized as an array of 128 rows by 109 columns of photo pixels. It was fabricated in 0.6µm CMOS technology.…”

Section: Architecture Of Imagermentioning

confidence: 99%

“…Our previous work in this area of research [5], resulted in a programmable focal plane image processing sensor with large fixed pattern noise. In this paper, we present a new imaging sensor with programmable analog processing units based on our low noise, linear current mode pixel [6]. The rest of the paper is organized as follows: We present the overall architecture of the sensor in section II and describe its operation in section III; Section IV discusses implementation of spatial convolution, Section V presents preliminary results of the sensor, and concluding remarks are presented in Section VI.…”

Section: Introductionmentioning

confidence: 99%

Low power CMOS image sensor with programmable spatial filtering

2009

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In this paper, we present a current mode CMOS image sensor with programmable convolution kernels consuming 35mW of power and operating at 30 frames per second. The image sensor is composed of a 128 by 109 pixel array, digital scanning registers, and a programmable analog processing unit. Convolution of the image is performed on the read-out in the periphery of the image array using digitally programmable low power analog circuits. Difference double sampling (DDS) is performed in the digital domain in order to improve the noise characteristics of the imager. Measurements and preliminary results from the fabricated image sensor are presented.

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“…4,6,7,8,9,10,11,12,13 Including the studies regarding what is called mixed-mode (voltage and current modes together) and purely current-mode, today there can be found a wide variety of sensors and readout circuits with better achievements in one or more of these figures of merit. 14,15,16,17,18,19,20 The sensor presented in this paper is a mixture of sensor modifications approach together with a new concept of readout. A matrix of CMOS pixels was designed to perform output signal amplification inside itself as if it was a very large MOS transistor.…”

Section: Introductionmentioning

confidence: 99%

Self-amplified CMOS image sensor using a current-mode readout circuit

2014

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The feature size of the CMOS processes decreased during the past few years and problems such as reduced dynamic range have become more significant in voltage-mode pixels, even though the integration of more functionality inside the pixel has become easier. This work makes a contribution on both sides: the possibility of a high signal excursion range using current-mode circuits together with functionality addition by making signal amplification inside the pixel. The classic 3T pixel architecture was rebuild with small modifications to integrate a transconductance amplifier providing a current as an output. The matrix with these new pixels will operate as a whole large transistor outsourcing an amplified current that will be used for signal processing. This current is controlled by the intensity of the light received by the matrix, modulated pixel by pixel. The output current can be controlled by the biasing circuits to achieve a very large range of output signal levels. It can also be controlled with the matrix size and this permits a very high degree of freedom on the signal level, observing the current densities inside the integrated circuit. In addition, the matrix can operate at very small integration times. Its applications would be those in which fast imaging processing, high signal amplification are required and low resolution is not a major problem, such as UV image sensors. Simulation results will be presented to support: operation, control, design, signal excursion levels and linearity for a matrix of pixels that was conceived using this new concept of sensor.

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Low power linear current mode imager with 1.5 transistors per pixel

Cited by 5 publications

References 7 publications

Linear current mode image sensor with focal plane spatial image processing

Linear current mode image sensor with focal plane spatial image processing

Low power CMOS image sensor with programmable spatial filtering

Self-amplified CMOS image sensor using a current-mode readout circuit

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