Low-power 2K-cell SDFL gate array and DCFL circuits using GaAs self-aligned E/D MESFETs

Vu, T.T.; Nelson, R.D.; Lee, G.M.; Roberts, P.C.T.; Lee, K.W.; Swanson, Steve; Peczalski, A.; Betten, W.R.; Hanka, S.A.; Helix, M.J.; Vold, P.J.; Lee, G.Y.; Jamison, S.; Arsenault, C.A.; Karwoski, S.M.; Naused, B.A.; Gilbert, Barry K.; Shur, M. S.

doi:10.1109/4.283

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Low-power 2K-cell SDFL gate array and DCFL circuits using GaAs self-aligned E/D MESFETs

Cited by 4 publications

References 7 publications

An Overview of Bipolar Gate Arrays and a Report of an IIL Gate Array Design and Development

An Overview of Bipolar Gate Arrays and a Report of an IIL Gate Array Design and Development

The performance of source-coupled FET logic circuits that use GaAs MESFETs

The application of gallium arsenide integrated circuit technology to the design and fabrication of future generation digital signal processors: promises and problems

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