Low-Noise Single Photon Avalanche Diodes in a 110nm CIS Technology

Moreno-García, Manuel; Xu, Hesong; Gasparini, Leonardo; Perenzoni, Matteo

doi:10.1109/essderc.2018.8486883

Cited by 9 publications

(6 citation statements)

References 7 publications

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“…At 2 V excess bias, the trap activation energy beyond 30 °C is calculated as 0.68 eV after fitting. Although we observe the same crossover temperature, this activation energy is lower than other reported devices in this technology [24]- [26], in which the authors see 1.1 eV activation energy, indicating that the dominant mechanism is direct thermal generation in their devices [24]- [26]. Also, this high-temperature activation energy in our devices changes with voltage (e.g.…”

Section: B Measurement Results Of N + /Hvpw Spads With a Virtual Gr A...contrasting

confidence: 62%

A 73% Peak PDP Single-Photon Avalanche Diode Implemented in 110 nm CIS Technology With Doping Compensation

Lee

Karaca

Kizilkan

et al. 2024

IEEE J. Select. Topics Quantum Electron.

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In this paper, we present 10 µm diameter SPADs fabricated in 110 nm CIS technology based on an N + /HVPW junction, with enhanced sensitivity at short wavelengths. To reduce tunneling noise due to the highly-doped layers in the process, a doping compensation technique is used, which allows to adjust the doping profile of the HVPW. Thanks to this technique, DCR is reduced by a factor of 24 at 2 V excess bias voltage when compared to non-compensated devices. Furthermore, the maximum achievable PDP is enhanced by 49% thanks to the much lower DCR leading to a PDP of 73%, the highest ever reported at 440 nm, while the DCR is 12.5 cps/µm 2 , all at the 5 V excess bias. Since the junction is formed very close to the surface, the SPAD has excellent sensitivity in the UV spectrum, with a PDP of 43% at a wavelength of 350 nm. The proposed SPAD also achieves a PDP of 7% with a timing jitter of 68 ps at 850 nm at 5 V excess bias, which makes the device very useful for RGB-Z (RGB-D) sensors.

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Section: B Measurement Results Of N + /Hvpw Spads With a Virtual Gr A...contrasting

confidence: 62%

A 73% Peak PDP Single-Photon Avalanche Diode Implemented in 110 nm CIS Technology With Doping Compensation

Lee

Karaca

Kizilkan

et al. 2024

IEEE J. Select. Topics Quantum Electron.

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“…Strong PDE modulation shown in Fig. 9(d) has also been observed for P+/N-well SPADs manufactured in 110-nm CMOS technology in [30].…”

Section: Sensor Characterizationsupporting

confidence: 55%

“…For more information, see https://creativecommons.org/licenses/by/4.0/ noise of dark counts at an acceptable level. If the temperature of a sensor is not stabilized, accurate dark count compensation is also challenging due to the temperature dependence of the DCR which can be ∼12%/ • C, for example [30]. Dark counts are not solely a problem of CMOS SPAD sensors, as dark counts in CMOS SPAD sensors are analogous to dark currents in CCD sensors.…”

Section: Introductionmentioning

confidence: 99%

CMOS SPAD Line Sensor With Fine-Tunable Parallel Connected Time-to-Digital Converters for Raman Spectroscopy

Talala

Virta

Nissinen

2023

IEEE J. Solid-State Circuits

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A 256-channel single-photon avalanche diode (SPAD) line sensor was designed for time-resolved Raman spectroscopy in 110-nm CMOS technology. The line sensor consists of an 8 × 256 SPAD array and 256 parallel connected time-todigital converters (TDCs). The adjustable temporal resolution and dynamic range of TDCs are 25.6-65 ps and 3.2-8.2 ns, respectively. The median timing skew along 256 channels is 43.7 ps, and TDC bin boundaries can be fine-tuned at the ps-level to enable precise timing skew compensation. The sensor is capable of real-time dark count measurement (two dark measurements for each excitation pulse) that gives accurate data for dark count compensation without any increment in measurement time. The maximum excitation pulse rate with realtime dark count measurement is 680 kHz. Raman spectra of six different samples were measured to prove the performance of the sensor in time-resolved Raman spectroscopy.

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“…Sensors based on single-photon avalanche diodes (SPADs) are nowadays employed in a wide variety of single-photon counting and fast-timing applications, e.g., high-energy physics [ 1 , 2 ]; time of flight (TOF) ranging and 3D imaging [ 3 ]; Raman spectroscopy [ 4 ]; and bio-medicine, including fluorescence-lifetime imaging microscopy [ 5 , 6 ] and positron emission tomography (PET) [ 7 , 8 , 9 ], to name a few. When implemented in CMOS image sensor technologies, SPAD sensor architectures benefit from the combination of per-pixel and per-chip processing and control circuitry with good-enough photodetectors [ 7 , 10 , 11 ]. Particularly, as Figure 1 illustrates, digital SiPMs employ micro-cells consisting of SPADs and embedded processing circuitry to directly encode SPAD avalanches into digital values, thus providing large flexibility for system implementation [ 12 ].…”

Section: Introductionmentioning

confidence: 99%

Architecture-Level Optimization on Digital Silicon Photomultipliers for Medical Imaging

Bandi

Ilisie

Vornicu

et al. 2021

Sensors

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Silicon photomultipliers (SiPMs) are arrays of single-photon avalanche diodes (SPADs) connected in parallel. Analog silicon photomultipliers are built in custom technologies optimized for detection efficiency. Digital silicon photomultipliers are built in CMOS technology. Although CMOS SPADs are less sensitive, they can incorporate additional functionality at the sensor plane, which is required in some applications for an accurate detection in terms of energy, timestamp, and spatial location. This additional circuitry comprises active quenching and recharge circuits, pulse combining and counting logic, and a time-to-digital converter. This, together with the disconnection of defective SPADs, results in a reduction of the light-sensitive area. In addition, the pile-up of pulses, in space and in time, translates into additional efficiency losses that are inherent to digital SiPMs. The design of digital SiPMs must include some sort of optimization of the pixel architecture in order to maximize sensitivity. In this paper, we identify the most relevant variables that determine the influence of SPAD yield, fill factor loss, and spatial and temporal pile-up in the photon detection efficiency. An optimum of 8% is found for different pixel sizes. The potential benefits of molecular imaging of these optimized and small-sized pixels with independent timestamping capabilities are also analyzed.

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Low-Noise Single Photon Avalanche Diodes in a 110nm CIS Technology

Cited by 9 publications

References 7 publications

A 73% Peak PDP Single-Photon Avalanche Diode Implemented in 110 nm CIS Technology With Doping Compensation

A 73% Peak PDP Single-Photon Avalanche Diode Implemented in 110 nm CIS Technology With Doping Compensation

CMOS SPAD Line Sensor With Fine-Tunable Parallel Connected Time-to-Digital Converters for Raman Spectroscopy

Architecture-Level Optimization on Digital Silicon Photomultipliers for Medical Imaging

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