Low-Noise and Wide-Dynamic-Range ROIC With a Self-Selected Capacitor for SWIR Focal Plane Arrays

Novel Multiple-Layer Stack Capacitor and Its Application in the IRPFA Readout Circuit

“…In conclusion, the formula model of the parallel-plate capacitor including fringe effect and temperature impact factor can be expressed by: 𝐶 0 = 𝐶 𝑢𝑛 * 𝐴𝑟𝑒𝑎 * 𝑡 𝑓𝑎𝑐 (16) 𝐶 1 = 𝐶 𝑒𝑑𝑔𝑒𝑓𝑓 * 𝑡 𝑓𝑎𝑐 (17) 𝐶 𝑀𝐸𝑇 = 𝐶 0 + 𝐶 1 (18) where C 0 is the capacitance for the interior part of the capacitor, Area is the area of the parallel-plate capacitor, C 1 is the capacitance for the peripheral part of capacitor and C MET is the total capacitance of the parallel-plate capacitor.…”

“…In this section, a high performance, 640×512 pixels, readout integrated circuit (ROIC) with snapshot mode integration is proposed and described. Typically, the ROIC consists of charge integration, charge to voltage conversion, pixel voltage multiplexing, signal transfer and amplification stage [16][17][18]. In our work, the block diagram of the readout structure consists of the block diagram of the readout structure plotted in Fig.…”