Low-Loss Broadband Package Platform With Surface Passivation and TSV for Wafer-Level Packaging of RF-MEMS Devices

Chen, Bangtao; Sekhar, Vasarla Nagendra; Cheng, Jun; Lim, Ying Ying; Toh, Justin See; Fernando, Saman; Sharma, Jaibir

doi:10.1109/tcpmt.2013.2263932

Cited by 41 publications

(18 citation statements)

References 27 publications

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“…Fig. 43 shows a typical WLCSP configuration where TSVs are placed in the cap wafer [304]. The insertion loss of 2 mm CPW lines with TSVs is in the range of 0.14-0.3 dB over 5-25 GHz, with a 1dB cut-off frequency of 27.4 GHz.…”

Section: Rf Memsmentioning

confidence: 99%

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Wang

2015

J. Microelectromech. Syst.

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After two decades of intensive development, 3-D integration has proven invaluable for allowing integrated circuits to adhere to Moore's Law without needing to continuously shrink feature sizes. The 3-D integration is also an enabling technology for hetero-integration of microelectromechanical systems (MEMS)/microsensors with different technologies, such as CMOS and optoelectronics. This 3-D heterointegration allows for the development of highly integrated multifunctional microsystems with small footprints, low cost, and high performance demanded by emerging applications. This paper reviews the following aspects of the MEMS/ microsensor-centered 3-D integration: fabrication technologies and processes, processing considerations and strategies for 3-D integration, integrated device configurations and wafer-level packaging, and applications and commercial MEMS/ microsensor products using 3-D integration technologies. Of particular interest throughout this paper is the heterointegration of the MEMS and CMOS technologies. [2015-0158]Index Terms-Three-dimensional (3-D) integration, microelectromechanical systems (MEMS), microsensor, packaging, hetero-integration, interposer, through-silicon-via (TSV), waferlevel packaging, microsystem.

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Section: Rf Memsmentioning

confidence: 99%

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Wang

2015

J. Microelectromech. Syst.

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“…To minimize and reduce the risks of losses, the silicon substrate used was 305 μm thick high resistivity MCZ silicon wafers (3-10 kΩ-cm) from Okmetic Oyj. If regular CZ Si-wafers had been used with low resistivity (≦100 Ω-cm), the magnetic fields would penetrate deeply into the substrate causing losses and reducing both the inductance and Q-factor [8], and be a lossy medium for RF signals [9]. The purpose to use thin Siwafers is to be able integrate the magnetic process flow with Silex established Cu-metalized TSV process flow [2], which requires 305 µm wafers.…”

Section: Fabricationmentioning

confidence: 99%

Multilayer ferromagnetic composites enabling on-chip magnetic-core inductors beyond 1 GHZ

Liljeholm

Ebefors

Rohrmann

et al. 2015

2015 Transducers - 2015 18th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS)

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This paper report of fabricated unpatterned ferromagnetic NiFe/AlN multilayer composites and an established process flow for magnetic core material suitable for integration with Silex 3D RF TSV technology. The fabricated single-loop test inductors achieved an inductance enhancement of 4.8 and a quality factor enhancement of 4.5 at 400 MHz. Simulations show that magnetic material in connection with 3D TSV inductors result in an inductance enhancement up to a factor of 5 at GHz frequencies for the same inductor area, or the same inductance can be achieved at 9 times smaller area and cost.

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“…In summary, influencing factors on damping losses can contribute to three aspects: vacuum packaging technology, materials properties, and mechanical structure topology. First, vacuum packaging scheme as the 2 Shock and Vibration most common one is used to greatly decrease air damping, such as epi-seal encapsulation process [20][21][22][23][24][25], hermetic lid sealing process [13,[26][27][28], Through-Silicon Via (TSV) process [29,30], and SPIL MEMS WLP process [31]. Second, some different kinds of materials are tried to yield lower the thermoelastic, surface deflect, and Akhiezer damping.…”

Section: Introductionmentioning

confidence: 99%

Energy Dissipation Contribution Modeling of Vibratory Behavior for Silicon Micromachined Gyroscope

Zhou

Shen

Xie

et al. 2018

Shock and Vibration

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Energy dissipation contribution of micro-machined Coriolis vibratory gyroscope (MCVG) is modeled, numerically simulated, and experimentally verified in this paper. First, the amount of independent damping dissipation consisting of thermoelastic loss, anchor loss, surface loss, Akhiezer loss, and air damping loss during vibration is obtained by simulation model, PML-based method, and numerical calculation, respectively. Then, temperature and pressure dependence characteristic of the corresponding quality factor (Q) for the MCVG are obtained. Meanwhile, dominant sources of damping dissipation are determined, which paves the way to improve Q. Finally, the temperature-dependent and pressure-dependent characteristics of the total Q are measured with errors of less than 10% and 18% compared with the simulated total Q, respectively, in which accuracy is acceptable for predicting the damping dissipation behavior of MCVG in design stage before high-cost fabrication.

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Low-Loss Broadband Package Platform With Surface Passivation and TSV for Wafer-Level Packaging of RF-MEMS Devices

Cited by 41 publications

References 27 publications

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

Multilayer ferromagnetic composites enabling on-chip magnetic-core inductors beyond 1 GHZ

Energy Dissipation Contribution Modeling of Vibratory Behavior for Silicon Micromachined Gyroscope

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