Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521)

DOI: 10.1109/melcon.2004.1346795

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Low-IF 90nm CMOS receiver for 2.5G application

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Cited by 5 publications

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A Multimode Radio Transceiver for Cellular Applications

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2009

Series on Integrated Circuits and Systems

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A Multimode Radio Transceiver for Cellular Applications

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2009

Series on Integrated Circuits and Systems

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No abstract

Programmable Frequency-Divider for Millimeter-Wave PLL Frequency Synthesizers

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et al. 2008

2008 38th European Microwave Conference

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In this paper, a novel 4-modulus programmable frequency divider, suitable for millimeter wave PLL frequency synthesizer applications, is presented. The proposed frequency divider is designed using dynamic logic D flip-flop, and the divider is implemented in a standard 90 nm CMOS technology to achieve high frequencies of operation with very low power consumption. Measurements show a maximum input frequency of 3.5 GHz, and a power consumption of 4.5 mW from a 1.0 V supply. To the best knowledge of the authors, this divider shows one of the best figure of merit in terms of maximum speed of operation, low power consumption, and division ratio ranges for multi-GHz frequency dividers.

A 1.2-V RF Front-End With On-Chip VCO for PCS 1900 Direct Conversion Receiver in 0.13-<tex>$mu$</tex>m CMOS

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et al. 2006

IEEE J. Solid-State Circuits

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No abstract

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