Low-Frequency Noise Characterization of Germanium n-Channel FinFETs

Oliveira, Alberto Vinícius de; Xie, Duan; Arimura, Hiroaki; Boccardi, G.; Collaert, N.; Claeys, Cor; Horiguchi, N.; Simoen, Eddy

doi:10.1109/ted.2020.2990714

Cited by 10 publications

(2 citation statements)

References 27 publications

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“…Low-frequency (LF) noise measurement is a nondestructive and efficient time-dependent diagnostic technique to characterize the traps at the interface between the different layers and identify trapping/detrapping events of carriers [1][2][3][4][5][6][7][8]. Converting data into frequency domains or analyzing data through a probabilistic approach makes the interpreting difficult-to-interpret characteristics easy [9][10][11][12][13]. The rise of three-dimensional devices, such as double-or tri-gate transistors [14][15][16][17], has attracted much attention for improving device performance and because of their immunity to short-channel effects (SCEs) [14,18,19].…”

Section: Introductionmentioning

confidence: 99%

Defect spectroscopy of sidewall interfaces in gate-all-around silicon nanosheet FET

Lee¹,

Kim²,

Lee³

et al. 2021

Nanotechnology

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Through time-dependent defect spectroscopy and low-frequency noise measurements, we investigate and characterize the differences of carrier trapping processes occurred by different interfaces (top/sidewall) of the gate-all-around silicon nanosheet field-effect transistor (GAA SiNS FET). In a GAA SiNS FET fabricated by the top-down process, the traps at the sidewall interface significantly affect the device performance as the width decreases. Compare to expectations, as the width of the device decreases, the subthreshold swing (SS) increases from 120 to 230 mV/dec, resulting in less gate controllability. In narrow-width devices, the effect of traps located at the sidewall interface is significantly dominant, and the 1/f 2 noise, also known as generation–recombination (G–R) noise, is clearly appeared with an increased time constant (τ i ). In addition, the probability density distributions for the normalized current fluctuations (ΔI D) show only one Gaussian in wide-width devices, whereas they are separated into four Gaussians with increased in narrow-width devices. Therefore, fitting is performed through the carrier number fluctuation-correlated with mobility fluctuations model that separately considered the effects of sidewall. In narrow-width GAA SiNS FETs, consequently, the extracted interface trap densities (N T ) distribution becomes more dominant, and the scattering parameter ( α S C ) distribution increases by more than double.

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Section: Introductionmentioning

confidence: 99%

Defect spectroscopy of sidewall interfaces in gate-all-around silicon nanosheet FET

Lee¹,

Kim²,

Lee³

et al. 2021

Nanotechnology

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“…Ge as channel material has been under the spotlight due to its higher mobility, lower energy bandgap that increases the carrier current density 26 . It is reported 27 that CMOS devices with Ge channel can be easily incorporated in Silicon process technology. Ge based FinFET configuration has shown better controllability on SCEs and improves drive capability 28 .…”

Section: Introductionmentioning

confidence: 99%

Impact of temperature on radio frequency/linearity and harmonic distortion characteristics of Ge multi‐channel fin shaped field‐effect transistor

Das

Maity

Chowdhury

et al. 2021

Int J RF Mic Comp-Aid Eng

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This dissertation demonstrates the reliability issues associated with the temperature of Ge multi‐channel fin shaped field‐effect transistor (Mch‐FinFET). Temperature dependence on short channel effectss such as threshold voltage (Vth), sub‐threshold swing (SS), and switching ratio are observed. The variation in temperature on various important radio frequency (RE)/analog, linearity, and harmonic distortion characteristics are studied and analyzed over a wide range of temperatures (300–500 K). The simulation study revealed that Mch‐FinFET devices exhibit 61.6% improvement in ION with minimum SS value. The improvement of SS, switching ratio and Vth can be observed with temperature fall. The enhancement in performance of various RF/analog attributes such transconductance, device efficiency, transconductance frequency product, gain frequency product, cut‐off frequency, and intrinsic gain with lowering of temperature. However, Mch‐FinFET device provides a significant improvement of higher‐order current and voltage intercept points such as IIP3, VIP2, VIP3, and 1 dB compression point with lesser harmonic distortion such as HD2, HD3, and THD at elevated temperature. The superior efficiency of DC and RF/analog attributes, greater linearity, and minor harmonic distortion performance of Mch‐FinFET make it more considerable to design low power Complementary metal–oxide–semiconductor (CMOS) circuits.

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Study on low-frequency noise characteristics of hydrogen-terminated diamond FETs

Wang

Simoen

et al. 2023

Diamond and Related Materials

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Low-Frequency Noise Characterization of Germanium n-Channel FinFETs

Cited by 10 publications

References 27 publications

Defect spectroscopy of sidewall interfaces in gate-all-around silicon nanosheet FET

Defect spectroscopy of sidewall interfaces in gate-all-around silicon nanosheet FET

Impact of temperature on radio frequency/linearity and harmonic distortion characteristics of Ge multi‐channel fin shaped field‐effect transistor

Study on low-frequency noise characteristics of hydrogen-terminated diamond FETs

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