Low-Complexity Real-Time Receiver for Coherent Nyquist-FDM Signals

Baeuerle, Benedikt; Josten, Arne; Eppenberger, Marco; Hillerkuss, D.; Leuthold, Juerg

doi:10.1109/jlt.2018.2877479

Cited by 28 publications

(6 citation statements)

References 42 publications

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“…where A(k) is the frequency-domain signal and H(k) is the frequency-domain channel response. Godard timing error detector is a frequency-domain timing error detector [30,31], which estimates the timing error as…”

Section: Timing Recovery With Phase Initializationmentioning

confidence: 99%

Fast-Convergence Digital Signal Processing for Coherent PON Using Digital SCM

Wang

Zhou

Xing

et al. 2023

J. Lightwave Technol.

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Optical access networks have been evolving to meet the explosive growth of data traffic. It is foreseeable that the 100Gb/s/λ and beyond passive optical network (PON) will be required in future optical access networks. Coherent optical communication is a promising solution for the future beyond 100G PON. However, the traditional digital signal processing (DSP) for coherent optical communication is difficult to realize fast convergence due to blind and complex algorithms. In this paper, we design a specific preamble structure and propose a burst-mode DSP to achieve fast convergence for the coherent PON. For verifying the feasibility of the proposed scheme, pointto-multi-point (P2MP) coherent PON is experimentally built up based on digital subcarrier multiplexing (DSCM), which is a kind of frequency division multiple access. When the allocated frequency of the optical network unit is suddenly changed, the DSP should converge fast to ensure a low handoff latency. In P2MP coherent PON, the proposed specific preamble structure and burst-mode DSP jointly implement the fast convergence using a short preamble with only 416 symbols. The experimental results show that the 8-Gbaud/SC×8-SCs 400Gb/s-net-rate coherent PON in burst-mode detection achieves the receiver sensitivity of approximately −27dBm at the 20% soft-decision forward error correction limit and approximately 35.5dB optical power budget with an optical pre-amplifier.

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Section: Timing Recovery With Phase Initializationmentioning

confidence: 99%

Fast-Convergence Digital Signal Processing for Coherent PON Using Digital SCM

Wang

Zhou

Xing

et al. 2023

J. Lightwave Technol.

View full text Add to dashboard Cite

show abstract

“…where A(k) is the frequency-domain signal and H(k) is the frequency-domain channel response. Godard timing error detector is a frequency-domain timing error detector [34,35], which estimates the timing error as…”

Section: Ts-a For Timing Recovery With Phase Initializationmentioning

confidence: 99%

Fast-Convergence Digital Signal Processing for Coherent PON using Digital SCM

Wang¹,

Zhou²,

Xing³

et al. 2023

Preprint

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<p>It is foreseeable that the 100 Gb/s/λ and beyond passive optical network (PON) will be required in future optical access networks to meet the explosive growth of data traffic. The coherent optical systems could be a promising solution for the future beyond 100G PON. Coherent PON using digital subcarrier multiplexing (DSCM) can provide flexible bandwidth allocation to a large number of access subscribers by dividing subcarriers of the DSCM signal into time slots for time-and-frequency division multiple access. When the optical network unit is allocated a new subcarrier, digital signal processing (DSP) should converge fast in the allocated time slot to ensure a low handoff latency for real-time bandwidth allocation. However, the traditional coherent DSP is hard to realize fast convergence due to blind and complex algorithms. In this paper, we design a specific training sequence (TS) structure and propose data-aided DSP to achieve fast convergence for coherent PON. The feasibility of the proposed scheme is experimentally verified in an 8 Gbaud/SC×8 SCs 400 Gb/s-net-rate coherent PON using DSCM with 16 quadrature amplitude modulation. The experimental results show that fast convergence is jointly realized by the proposed TS structure and data-aided DSP using a 416-symbol TS with a 52 ns duration. The receiver sensitivity at the 20% soft-decision forward error correction limit is approximately −27 dBm and an optical power budget of about 35.5 dB is achieved with a booster amplifier.</p>

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“…However, because of their limited logic resources, FPGAs can accommodate only smaller systems, e.g. only one polarization out of two [3]. In contrast, ASICs may appear to have unlimited resources.…”

Section: Real-time Implementation Platformsmentioning

confidence: 99%

“…It is challenging to implement ADCs with high sampling rates. While digital subcarrier multiplexing offers one path to limiting symbol rate at the system level [3,13], choice of oversampling is a trade-off available during receiver implementation. An oversampling of 2 samples per symbol (SPS) has been common, since this choice relaxes ADC requirements and enables powerful equalization schemes [7].…”

Section: Dsp For Intradyne Coherent Receiversmentioning

confidence: 99%