Low-complexity high-quality adaptive deblocking filter for H.264/AVC system

Hsia, Shih-Chang; Hsu, Wen-Jing; Lee, Sheng-Chieh

doi:10.1016/j.image.2012.04.004

Cited by 4 publications

(3 citation statements)

References 8 publications

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“…S.C. Hsia, W.C. Hsu, and S.C. Lee [17] implemented a low complexity and high quality adaptive de-blocking filter for H.264/AVC system. An adaptive offset technique used here to enhance the quality of the image for H.264 de-coding.…”

Section: Literature Surveymentioning

confidence: 99%

An Efficient VLSI Implementation of De-Blocking Filter with CSLA for H.264

Suresh¹,

Hiremath²

2019

IJIES

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The De-blocking filter is used in H.264 video codec for improving the quality of video. The De-blocking filter helps in removing the artifacts which are generated due to block based transform. In this research work, the Modified Filter Order (MFO)-Carry Select Adder (CSLA) based De-Blocking Filter (DBF) is introduced to improve the video quality, which is named as MFO-CSLA-DBF architecture. Conventional H.264 standard DBF requires more area due to a separate storage block of the horizontal and vertical data. To solve this problem, this paper implemented modified filter order architecture to reduce the memory and area for storing filter block data. The complexity of the boundary block has reduced by minimizing the boundary strength values. Furthermore, the CSLA design used for the data merging process in the DBF architecture instead of normal adder designs that also occupies less area in the MFO. The MFO-CSLA-DBF architecture improved the quality of the video by increasing Peak-to-Noise Ratio (PSNR), Structure similarity Index Matrix (SSIM) for different resolutions such as Quarter Common Intermediate Format (QCIF-176×144) and Common Intermediate Format (CIF-352×288). This MFO-CSLA-DBF architecture was implemented in the Xilinx tool by using the Verilog code for the Virtex-6 FPGA device. In this research work experimental results showed that MFO_CSLA_DBF architecture has reduced hardware utilization of FPGA for DBF from 2-3 % compared to the traditional DBF technique.

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Section: Literature Surveymentioning

confidence: 99%

An Efficient VLSI Implementation of De-Blocking Filter with CSLA for H.264

Suresh¹,

Hiremath²

2019

IJIES

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“…These artifacts can be removed using deblocking filtering (DBF). Although, the DBF in HEVC is similar to that in the H.264/AVC standard [5] and is also implemented in the inter-prediction process [6], the DBF design in HEVC is simpler in terms of its decision making process [7]. In HEVC, the DBF is followed by a sample adaptive offset (SAO) filter [8].…”

Section: Introductionmentioning

confidence: 99%

An Adaptive Deblocking Filter to Improve the Quality of the HEVC Standard

Eldeken¹,

Salama²

2015

IJIGSP

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In this paper, we present an adaptive deblocking filter to improve the video quality for high efficiency video coding (HEVC) scheme. The HEVC standard is a hybrid coding scheme using block-based prediction and transform encoding/decoding. At the decoding step, the boundary of any two adjacent blocks causes visual discontinuities called blocking artifacts that can be removed using deblocking filter. Conventional approaches, including the HEVC standard, tend to remove those artifacts using two offset parameters that are defaulted to 0. However, such a choice is not necessarily suitable to encode/decode all video sequences. The proposed approach reduces an exhaustive search among a set of candidate offsets to eventually select the best offsets adaptively (i.e., for each frame) according to some characteristics of the data sequences. Improvements are shown using the proposed approach in terms of ratedistortion (RD) performance as opposed to the HEVC standard without changing the compression ratio and with negligible change in the encoding/decoding time.

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“…Each CU can be further split into either prediction units (PUs) or transform unit (TUs) using the quadtree structure. The size of each TU, used in the prediction error coding, is ranged from 4×4 upto 32×32 leading to larger transformations than that of the H.264/AVC that only uses 4×4 and 8×8 transforms [4]. In turn, the high resolution videos can be encoded using the HEVC more efficiently than that of the H.264/AVC standard [2].…”

Section: Introductionmentioning

confidence: 99%

A New Implementation of High Resolution Video Encoding Using the HEVC Standard

Eldeken

Fouad

Salama

et al. 2015

Advances in Intelligent Systems and Computing

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Abstract. In this paper, the implementation method for encoding the high resolution videos using high efficiency video coding (HEVC) standard is introduced with a new approach. The HEVC standard, successor to the H.264/AVC standard, is more efficient than the H.264/AVC standard in the encoding high resolution videos. HEVC has been designed to focus on increasing video resolution and increasing the use of parallel processing architectures. Therefor, this approach merging all traditional configuration files used in the encoding process into only one configuration file without removing any parameters used in the traditional methods. Improvements are shown using the proposed approach in terms of encoding time as opposed to the traditional methods by reducing the access time by half which resulting from reducing the data exchange between the configuration files used in this process and without changing the rate-distortion (RD) performance or compression ratio.

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Low-complexity high-quality adaptive deblocking filter for H.264/AVC system

Cited by 4 publications

References 8 publications

An Efficient VLSI Implementation of De-Blocking Filter with CSLA for H.264

An Efficient VLSI Implementation of De-Blocking Filter with CSLA for H.264

An Adaptive Deblocking Filter to Improve the Quality of the HEVC Standard

A New Implementation of High Resolution Video Encoding Using the HEVC Standard

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