Low complexity 3D depth map generation for stereo applications

Chien, Chiang‐Ju; Chang, Cheng-Yen; Lee, Jui-Sheng; Chang, Jia-Hou; Guo, Jiun-In

doi:10.1109/icce.2011.5722530

Cited by 7 publications

(1 citation statement)

References 9 publications

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“…The parallel 3D depth map generator is then integrated into a 3D video playing system to demonstrate its capability. Figure 10 shows the depth map generation algorithm [16], which generates depth maps from single 2D images. The algorithm can operate on three types of input images: images of general scenes with a vanishing point (VP), images of scenery containing sky and mountains, and close-up images.…”

Section: Case Studymentioning

confidence: 99%

A Verification-Aware Design Methodology for Thread Pipelining Parallelization

Jian

Chien

Chen

et al. 2012

IEICE Trans. Inf. & Syst.

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SUMMARYThis paper proposes a verification-aware design methodology that provides developers with a systematic and reliable approach to performing thread-pipelining parallelization on sequential programs. In contrast to traditional design flow, a behavior-model program is constructed before parallelizing as a bridge to help developers gradually leverage the technique of thread-pipelining parallelization. The proposed methodology integrates verification mechanisms into the design flow. To demonstrate the practicality of the proposed methodology, we applied it to the parallelization of a 3D depth map generator with thread pipelining. The parallel 3D depth map generator was further integrated into a 3D video playing system for evaluation of the verification overheads of the proposed methodology and the system performance. The results show the parallel system can achieve 33.72 fps in D1 resolution and 12.22 fps in HD720 resolution through a five-stage pipeline. When verifying the parallel program, the proposed verification approach keeps the performance degradation within 23% and 21.1% in D1 and HD720 resolutions, respectively.

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Section: Case Studymentioning

confidence: 99%