Loop transformation using nonunimodular matrices

Fernandez, A.; Llaberia, J.M.; Valero-García, Miguel

doi:10.1109/71.406959

Cited by 17 publications

(13 citation statements)

References 11 publications

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“…Fernández et al [18] address the problem of correcting in a systematic way the bounds of the MCS given by the Fourier-Motzkin algorithm in order to produce the precise bounds of the BT IS. To characterize the BT IS, they use the Hermite Normal Form 3 H of the transformation matrix T [18], [19].…”

Section: Frameworkmentioning

confidence: 99%

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A cost-effective implementation of multilevel tiling

Jimenez

Llaberia

Fernandez

2003

IEEE Trans. Parallel Distrib. Syst.

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This paper presents a new cost-effective algorithm to compute exact loop bounds when multilevel tiling is applied to a loop nest having affine functions as bounds (nonrectangular loop nest). Traditionally, exact loop bounds computation has not been performed because its complexity is doubly exponential on the number of loops in the multilevel tiled code and, therefore, for certain classes of loops (i.e., nonrectangular loop nests), can be extremely time consuming. Although computation of exact loop bounds is not very important when tiling only for cache levels, it is critical when tiling includes the register level. This paper presents an efficient implementation of multilevel tiling that computes exact loop bounds and has a much lower complexity than conventional techniques. To achieve this lower complexity, our technique deals simultaneously with all levels to be tiled, rather than applying tiling level by level as is usually done. For loop nests having very simple affine functions as bounds, results show that our method is between 1.5 and 2.8 times faster than conventional techniques. For loop nests having not so simple bounds, we have measured speedups as high as 2,300. Additionally, our technique allows eliminating redundant bounds efficiently. Results show that eliminating redundant bounds in our method is between 2.2 and 11 times faster than in conventional techniques for typical linear algebra programs.

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Section: Frameworkmentioning

confidence: 99%

“…To characterize the BT IS, they use the Hermite Normal Form 3 H of the transformation matrix T [18], [19]. Both H and T generate the same lattice in Z n .…”

Section: Frameworkmentioning

confidence: 99%

A cost-effective implementation of multilevel tiling

Jimenez

Llaberia

Fernandez

2003

IEEE Trans. Parallel Distrib. Syst.

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“…However holes can be easily avoided when scanning TTIS by using specific increment steps in the n inner loop indexes. The appropriate increment steps are directly obtained from the Hermite Normal Form of the transformation matrix, as proved in [19,9] and discussed in [11]. Thus, we have managed to greatly reduce the number of affine expressions in the loop bounds of the transformed loop, with the overhead of a linear transformation required for each iteration from the transformed iteration space to the initial iteration space.…”

Section: Examplementioning

confidence: 99%

Automatic parallel code generation for tiled nested loops

Goumas¹,

Drosinos²,

Athanasaki³

et al. 2004

Proceedings of the 2004 ACM Symposium on Applied Computing

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This paper presents an overview of our work, concerning a complete end-to-end framework for automatically generating message passing parallel code for tiled nested for-loops. It considers general parallelepiped tiling transformations and general convex iteration spaces. We address all problems regarding both the generation of sequential tiled code and its parallelization. We have implemented our techniques in a tool which automatically generates MPI parallel code and conducted several series of experiments, concerning the compilation time of our tool, the efficiency of the generated code and the speedup attained on a cluster of PCs. Apart from confirming the value of our techniques, our experimental results show the merit of general parallelepiped tiling transformations and verify previous theoretical work on scheduling-optimal tile shapes.

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“…Independently from each other can be calculated: 1) the incomplete values of the criterion, located on one minor diagonal of the graph of pairwise correspondences, 2) all elements belonging to the upper (or lower) triangle of the matrix of values of pairwise dissimilarity (Figure 4), 3) all matrices of pairwise dissimilarity. Parallelization at the first level requires frequent interaction of processes or threads and is associated with the costs of synchronization, what can also lead to inefficient use of the cache [17][18][19][20][21] and, accordingly, does not provide the desired acceleration of computations.…”

Section: Parallel Comparison Of Fragments Of Electroencephalogramsmentioning

confidence: 99%

“…The use of modern parallel computing technologies is a fundamentally different direction for increasing productivity of signals comparison. However, the implementation of known parallel versions of DTW procedure (as well as similar tasks with cycles having diagonal dependencies) do not give the desired effect due to the need for frequent synchronization of processes or threads, and in some cases may even lead to an increase in the operating time compared to the serial version because of less efficient work with the cache memory [17][18][19][20][21].…”

Section: Introductionmentioning

confidence: 99%

High-performance DTW-based signals comparison for the brain electroencephalograms analysis

Makarova¹,

Sulimova²

2017

Collection of Selected Papers of the III International Conference on Information Technology and Nanotechnology

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Automatic analysis of electroencephalograms (EEGs) is one of the promising areas of research, which results can be used, in particular, to build systems of mental control of objects. The Dynamic Time Warping procedure (DTW) is used in this work for comparing signals representing EEG. An important feature of the problem we are considering is the need for multiple comparison of signals at the stage of machine learning, which requires enormous computational costs. We propose a parallel algorithm that was implemented in C++ using the MPI technology and tested using the resources of the supercomputer complex of Moscow State University "Lomonosov". The results of its testing on real data showed that the proposed method allows achieving an almost linear speedup and reducing the total calculation time from 29 days to 3.5 hours using 128 processes, which opens the possibility of improving the quality of automatic analysis of electroencephalograms.

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Loop transformation using nonunimodular matrices

Cited by 17 publications

References 11 publications

A cost-effective implementation of multilevel tiling

A cost-effective implementation of multilevel tiling

Automatic parallel code generation for tiled nested loops

High-performance DTW-based signals comparison for the brain electroencephalograms analysis

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