Logical Design of Ternary Switching Circuits

Yoeli, Michael; Rosenfeld, G.

doi:10.1109/pgec.1965.264050

Cited by 64 publications

(22 citation statements)

References 8 publications

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“…Among the MVLs, ternary logic is distinctive because of its simpler circuit realization and a well-established theoretical basis [11]. Many ternary logic models exist in the literature, but they generally involve high power consumption even in static state [12].…”

Section: Ternary Logic Preliminariesmentioning

confidence: 99%

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VLSI implementation of ternary gates using Tanner Tool

Dhande

Narkhede

Dudam

2014

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)

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A new era of digital computation investigates the advantages of non-binary machine logic over the conventional binary logic. Multi Valued Logic [MVL] systems, where the radix is greater than 2 are evolving as a thrust area of research. Ternary logic has gained wide popularity and offers several potential opportunities for the improvement of present VLSI circuit designs. Ternary gates form the fundamental element for numerous ternary circuits, making its efficient design and simulation indispensable. This paper presents the implementation and simulation of ternary gates (TNOT, TNAND, TNOR) using injected voltage method. The binary CMOS logic is exploited to achieve the ternary logic values. The performance analysis of the ternary gates in terms of rise time, fall time and power dissipation is examined using Tanner Tool, version 13.02. The prominent subsets (S-Edit, L-Edit, T-Spice and W-Edit) of the tanner tool are used to derive the various device parameters and further verify the functionality of the gates. The layouts of the designed gates are also presented.

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Section: Ternary Logic Preliminariesmentioning

confidence: 99%

“…The Yoeli-Rosinfeld algebra [11] defines three basic ternary elements, the STI (simple ternary inverter) PTI (positive ternary inverter) & NTI (Negative ternary inverter) such that,…”

Section: A Ternary Invertermentioning

confidence: 99%

VLSI implementation of ternary gates using Tanner Tool

Dhande

Narkhede

Dudam

2014

2014 2nd International Conference on Devices, Circuits and Systems (ICDCS)

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“…A multiple-valued logic, begun with Post [9] and con tinued with many further developments [10] [11] , is a set which extends binary notation to 0, 1, 2 , ... , (m-2), (m-1), a set of m values. Post algebra consists of a set Q of m logic values and a set V of three basic operations MAX (x1, x2, ... ,xn), MIN (x1, x2, ... ,xn) and literal, denoted by +, • , and x(a , b) respectively.…”

Section: Mvl Networkmentioning

confidence: 99%

A Learning Multiple-Valued Logic Network that can Explain Reasoning

1999

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This paper describes a learning multiple-valued logic (MVL) network that can explain reasoning. The learning MVL network is derived directly from a canonical realization of MVL functions and therefore its functional completeness is guaranteed. We develop traditional back-propagation to the MVL networks and drive a specific algorithm for the MVL networks. The algorithm combines back-propagation learning with other features of MVL networks, including the prior human knowledge on the MVL networks, for example, the rchitecture, the number of hidden units and layers, and many other useful parameters for the networks. The prior knowledge from the MVL canonical form can be used as initial parameters of the learning MVL network in its learning process. As a result, the prior knowledge can guide the back-propagation learning process to get started from a point in the parameter space that is not far from the optimal one, thus, back-propagation can fine-tune the prior knowledge for achieving a desired output easily. This cooperative relation between the prior knowledge and the back-propagation learning process is not always present in neural networks. The learning process in the MVL network also shares some cytology behaviors, in particular the cell adhesion, the cell aptopsis (the death of cell), and the cluster cell aptopsis (the death of cluster cells), and presents these properties in the artificial MVL network successfully. Simulation results are also given to confirm the effectiveness of the methods.

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“…We introduce a special binary-ternary switching algebra and demonstrate its suitability to the analysis of such ternary-transmission contact networks. Thii algebra is to be distinguished from the ternary algebras used e.g., in connection with ternary voltage switching circuits [I], [2] or for the study of static hazards of binary switching circuits [3].…”

Section: Ternary-transmission Contact Networkmentioning

confidence: 99%