2019
DOI: 10.1007/978-981-15-0633-8_141
|View full text |Cite
|
Sign up to set email alerts
|

Logic Design and Modeling of an Ultraefficient 3 × 3 Reversible Gate for Nanoscale Applications

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
5

Citation Types

0
6
0

Year Published

2020
2020
2022
2022

Publication Types

Select...
6
2

Relationship

5
3

Authors

Journals

citations
Cited by 11 publications
(7 citation statements)
references
References 15 publications
0
6
0
Order By: Relevance
“…Because the energy dissipation during state transition and propagation in QCA is negligible [4][5][6], there is significantly minimal energy dissipation when compared to CMOS technology. QCA is thoroughly investigated, and many logics are being proposed for diverse purposes, including reversible logic [6][7][8][9], arithmetic circuits [4,5,[10][11][12][13][14][15][16], code converters [17][18][19][20][21], sequential circuits [17,[22][23][24][25], memories [26][27][28][29], and so on.…”
Section: Introductionmentioning
confidence: 99%
“…Because the energy dissipation during state transition and propagation in QCA is negligible [4][5][6], there is significantly minimal energy dissipation when compared to CMOS technology. QCA is thoroughly investigated, and many logics are being proposed for diverse purposes, including reversible logic [6][7][8][9], arithmetic circuits [4,5,[10][11][12][13][14][15][16], code converters [17][18][19][20][21], sequential circuits [17,[22][23][24][25], memories [26][27][28][29], and so on.…”
Section: Introductionmentioning
confidence: 99%
“…Over the last decade it has been exhaustively used to design various digital logics such as adders and subtractors [7][8][9][10][11], sequential circuits [12][13][14][15], reversible logic [11,[16][17][18][19][20][21], memories [22][23][24][25][26], code converters [27][28][29][30][31] and image processing [32][33][34][35]. A new optimized design of D flip flop in QCA is first presented which is then used to design 2-, 3-, 4-and 8-bits shift registers which are scalable up to N-bits.…”
Section: Introductionmentioning
confidence: 99%
“…Figure 2B, includes the crossover of cells in clock zone 0 and zone 2, while cells in clock zone 1 and zone 3 are used in the third process, as shown in Figure 2C. Over the last decade, QCA technology has been frequently used for designing different digital circuits such as adders, 5,6 multiplexers, 7–11 switching circuits, 12–14 reversible logic, 1,4,15–17 sequential circuits, 18–21 etc. One such application area considered in this paper is the design of coplanar random access memories.…”
Section: Introductionmentioning
confidence: 99%