Liveness and Boundedness Preservations of Sharing Synthesis of Petri Net Based Representation for Embedded Systems

Xia, Chuanliang; Shen, Bin; Zhang, Hailin; Wang, Yi‐Gui

doi:10.32604/csse.2018.33.345

Cited by 4 publications

(4 citation statements)

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“…In order to enhance the verification effectiveness of PRES+, Xia [11] presented transition refinement method. A sharing synthesis approach for PRES+ is presented in [12]. Under certain constraints, the synthesis PRES+ will preserve boundedness and liveness.…”

Section: Introductionmentioning

confidence: 99%

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The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Xia

Wang

2022

Electronics

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Embedded systems are widely used in various devices. PRES+ (Petri net- based Representation for Embedded Systems) has been used to model and analyze embedded systems. However, it cannot characterize the priority of events, and cannot fully express the complex data flow and control flow. To solve this problem, inhibitor arcs are added to PRES+ and PIRES+ (PRES+ with Inhibitor arcs) is obtained. However, PIRES+’s state space explosion problem is a handicap when modeling, verifying, and controlling complex, large embedded systems. To mitigate the state space explosion problem of PIRES+ and analyze complex embedded systems, we propose the place refinement approach and the place set refinement approach for PIRES+. Under specific conditions, several important properties of PIRES+, such as timing, functionality, reachability, liveness, and boundedness, are preserved by using these refinement approaches. In order to illustrate the effectiveness of these refinement methods, as an example, the modeling and analysis of a network communication system is proposed. The refinement methods proposed have certain feasibility and practicability and provide a more practical theoretical basis for the modeling of some embedded systems.

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Section: Introductionmentioning

confidence: 99%

“…In the literature, many authors have investigated Petri net transformation methods to mitigate the problem of state space explosion. The three popular transformations of Petri net are refinement [11,[16][17][18][19][20][21][22][23][24][25][26][27][28][29], reduction [30][31][32][33], and synthesis [12,14,[34][35][36][37][38][39].…”

Section: Introductionmentioning

confidence: 99%

The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Xia

Wang

2022

Electronics

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“…In the literature, there exist several models to describe embedded systems, such as finite state machines, data flow graphs, and Petri nets. The Petri-net-based Representation for Embedded Systems (PRES+) is an excellent methodology for modeling, verification, and analysis of embedded systems [2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

“…Karlsson et al [3] proposed a method for PRES+ to integrate with component based system level design. Xia et al [5,6] proposed a refinement method and a synthesis method for PRES+ model to preserve several dynamic properties.…”

Section: Introductionmentioning

confidence: 99%

Reduction Rules for Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Xia¹,

Zhang²,

Wang³

2019

dtcse

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Petri-net-based Representation for Embedded Systems (PRES+) can describe embedded systems. To improve the modeling ability of PRES+, we add inhibitor arcs to the PRES+ model. Then, Petri net with Inhibitor arcs based Representation for Embedded Systems (PIRES+) is obtained. However, the state space explosion problem is a disadvantage for PIRES+'s ability to model and verify complex embedded systems. In order to solve this problem, reduction rules are proposed. Under certain conditions, these reduction rules preserve total-equivalence.

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Shared Subnet Synthesis of Object-Oriented Petri Net Based Representation for Embedded Systems

Xia,

Zan

2024

Lecture Notes in Computer Science

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Liveness and Boundedness Preservations of Sharing Synthesis of Petri Net Based Representation for Embedded Systems

Cited by 4 publications

References 0 publications

The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Reduction Rules for Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Shared Subnet Synthesis of Object-Oriented Petri Net Based Representation for Embedded Systems

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