Reduction Rules for Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

Abstract

Petri-net-based Representation for Embedded Systems (PRES+) can describe embedded systems. To improve the modeling ability of PRES+, we add inhibitor arcs to the PRES+ model. Then, Petri net with Inhibitor arcs based Representation for Embedded Systems (PIRES+) is obtained. However, the state space explosion problem is a disadvantage for PIRES+'s ability to model and verify complex embedded systems. In order to solve this problem, reduction rules are proposed. Under certain conditions, these reduction rules preserve total-equivalence.

Property Preservation of Object-Oriented Petri Reduction Net Based Representation for Embedded Systems

“…Synthesis [11][12][13][14][15], reduction [16][17][18][19][20][21][22][23][24], and refinement [25][26][27][28][29] are three commonly used Petri net transformation methods. Reduction is an important transformation method.…”

“…Bønneland et al [21] described the structure reduction techniques used in reachability queries on weighted Petri net with inhibitor arcs. Xia [22] proposed a set of reduction rules for the PRES+ model to preserve total equivalence. Xia et al [23] proposed several reduction rules for Petri net with inhibitor arcs based representation for embedded systems (PIRES+).…”

“…Xia [22] proposed a set of reduction rules for the PRES+ model to preserve total equivalence. Xia et al [23] proposed several reduction rules for Petri net with inhibitor arcs based representation for embedded systems (PIRES+). Li et al [24] proposed several reduction rules for the bounded labeled Petri nets (LPNs).…”