Liquid-Phase Crystallized Silicon Solar Cells on Glass: Increasing the Open-Circuit Voltage by Optimized Interlayers for n- and p-Type Absorbers

Periodic and Random Substrate Textures for Liquid-Phase Crystallized Silicon Thin-Film Solar Cells

“…The capping layer is removed by wet chemical etching in buffered-HF for nine minutes. On both textured glasses as well as on planar reference substrates 15-µm thick LPC n-doped silicon thin-film solar cells with a doping concentration of ~ 5·10 16 cm -3 have been prepared as described in [20], there denoted as test structure. A schematic solar cell device structure as well as atomic force microscope (AFM) images of sinusoidal and MST textured glass substrates are depicted in Fig.…”

“…2 the optical properties of both texture types are compared regarding their anti-reflection potential in state-ofthe-art 10-µm thick LPC silicon absorber layers with a SiN x 70 nm / SiO x 10 nm interlayer stack [20]. The sample stack under investigation is schematically depicted as an inset with a color code according to Fig.…”

“…Therefore, the thinnest 5 nm SiO x barrier (red) is favorable for implementation into LPC-Si solar cell devices. Lower SiO x thicknesses were not evaluated since they are known to degrade the electronic properties of a solar cell [20]. In order to compare different silicon absorber layer thicknesses (Fig.…”

Angle-Resolved Reflectivity Analysis of Textured Substrates for Liquid-Phase Crystallized Silicon Thin-Film Solar Cells

“…1(a)], the master structure was prepared by interference lithography [5]. Adapted from the optimized planar reference stack, the sinusoidal texture is coated with 70 nm of SiN x and 10 nm of SiO x , serving as anti-reflective and passivation layers, respectively [6,8]. For the SMART texture [ (Fig.…”

“…Therefore, no additional SiN x layer is needed. For planar reference samples, a state-of-the-art interlayer stack of 250 nm SiO x , 70 nm SiN x and 10 nm SiO x is employed [6,8]. Using electron-beam evaporation with a substrate temperature of T = 600 • C, a 8 µm thick silicon layer is deposited onto each superstrate.…”