SCS 2003. International Symposium on Signals, Circuits and Systems. Proceedings (Cat. No.03EX720)
DOI: 10.1109/isqed.2004.1283652
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Leveraging delay slack in flip-flop and buffer insertion for power reduction

Lucanus J. Simonson1,
King Ho Tam2,
N. Akkiraju
3
et al.

Abstract: Abstract

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Cited by 3 publications
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