Level-Crossing ADC Performance Evaluation Toward Ultrasound Application

Kozmin, Kirill; Johansson, Jonny; Delsing, Jerker

doi:10.1109/tcsi.2008.2010094

Cited by 82 publications

(26 citation statements)

References 24 publications

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“…Accordingly, no data are fed through to higher levels in the system, allowing these to remain idle. These possibilities in the design of sensor front ends have been explored for ultrasound measurement systems [22] as well as for other energy constrained sensor applications [23]. In terms of energy cost, the A/D conversion is dominant in the scenarios discussed above.…”

Section: B Low Power Analog Front End Architecturementioning

confidence: 99%

Concepts and architecture for a thumb-sized smart IoT ultrasound measurement system

Delsing

Deventer

Eliasson

et al. 2016

2016 IEEE International Ultrasonics Symposium (IUS)

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Abstract-This paper presents the technology concepts for a "thumb"-sized self-contained ultrasonic IoT measurement system. An overall architecture is proposed, and key elements are discussed with solutions using existing technology, thus arguing that realization is possible with the current technology.Such an ultrasonic IoT measurement system is constrained by its size and available energy, although it requires at least decent computational and communication resources. Because streaming data from such a device is not advisable from an energy viewpoint, there is a need for resource efficient (energy, memory and computational power) data analysis.An architecture with the following parts as well as some implementation details and performance data are proposed here:• Energy supply, battery and super capacitor • Transducer excitation achieving almost zero electrical losses • Event detection sensor interface • Data aggregation using sparse approximation and learned feature dictionaries, adapted to resource constrained embedded systems • IoT communication protocols and implementations enabling event -based communication and System of Systems integration capabilities The optimization of system level performance requires each subsystem to be optimized for the specific measurement situation taking into account the subsystem interdependencies. This can be performed using a combined electrical and acoustical model of the system. Here, the model allowing electronic and acoustic co-simulation using SPICE is an important tool bridging the electronic and acoustic domains.

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Section: B Low Power Analog Front End Architecturementioning

confidence: 99%

Concepts and architecture for a thumb-sized smart IoT ultrasound measurement system

Delsing

Deventer

Eliasson

et al. 2016

2016 IEEE International Ultrasonics Symposium (IUS)

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“…Rather than sampling the signals [39] at a constant high rate, the ADC can be designed to adapt its sampling rate according to the activity of the signal [37][38][39][40][41]. Therefore, the power consumption of the ADC can become proportional to the activity of the analog input, as illustrated in Fig.…”

Section: Time Domain Propertiesmentioning

confidence: 99%

“…For input signals that have burst-like properties in time domain, such as ECG signals, ultrasound signal and UWB impulse signals, significant power can be saved. This approach has been demonstrated in [39][40][41]. This type of ADCs is commonly referred to as a 'level-crossing' or 'event-driven' ADC [38,41].…”

Section: Time Domain Propertiesmentioning

confidence: 99%

Enhancing ADC Performance by Exploiting Signal Properties

Lin

Hegt

Doris

et al. 2015

Analog Circuits and Signal Processing

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This chapter starts with a brief introduction of the analog-to-digital conversion process in Sect. 2.1 and a discussion of factors that define the performance of ADCs in Sect. 2.2. ADC performance limitations and trends are addressed in Sect. 2.3. In Sect. 2.4, a brief discussion of popular Nyquist-rate ADC topologies is given where the topologies most relevant to the focus of this book are discussed with the associated tradeoffs. A signal/system-aware design approach which exploits certain signal properties to enhance the ADC performance is discussed in Sect. 2.5 and examples are shown. Introduction to Analog-to-Digital ConvertersAn analog-to-digital converter is an electronic circuit which converts a continuoustime and continuous-amplitude analog signal to a discrete-time and discreteamplitude signal [1]. The analog-to-digital conversion involves three functions, namely sampling, quantizing and encoding [2], as shown in Fig. 2.1. After the conversion, the continuous quantities have been transformed into discrete quantities with a certain amount of error due to the finite resolution of the ADC and imperfections of electronic components. The purpose of the conversion is to enable digital processing on the digitized signal.ADCs are essential building blocks in electronic systems where analog signals have to be processed, stored, or transported in digital form. The ADC can be a stand-alone general purpose IC, or a subsystem embedded in a complex system-onchip (SoC) IC. A main driving force behind the development of ADCs over the years has been the field of digital communications due to continuous demand of higher data rates and lower cost [2]. In Fig. 2.2, a block diagram of a typical digital communication system is shown and the location of the ADC in the system is indicated [3]. The ADC is normally preceded by signal conditioning blocks (e.g. amplifiers, filters, mixers, modulators/demodulators, detectors, etc.) and followed by the baseband digital signal processing unit. With the advance in CMOS process

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“…The conventional sampling is replaced with asynchronous mapping of analog signal value into the time domain. Existing implementations use a level-crossing sampling [14][15][16][17][18], asynchronous Sigma-Delta modulator [6,7], or a hybrid approach [8,19]. The A-ADCs based on the levelcrossing sampling [20,21] are the instantaneous value converters, while the A-ADCs with TEMs serve as the mean value converters due to inherent integration properties [6].…”

Section: Asynchronous Adcsmentioning

confidence: 99%