Leakage-Reduction Design Concepts for Low-Power Vertical Tunneling Field-Effect Transistors

Abstract

Using an atomistic full-band quantum transport solver, we investigate the performances of vertical band-to-band tunneling FETs (TFETs) whose operation is based on the enhancement of the gate-induced drain leakage mechanism of MOSFETs, and we compare them to lateral p-i-n devices. Although the vertical TFETs offer larger tunneling areas and therefore larger ON currents than their lateral counterparts, they suffer from lateral source-to-drain tunneling leakage away from the gate contact. We propose a design improvement to reduce the OFF current of the vertical TFETs, maintain large ON currents, and provide steep subthreshold slopes.Index Terms-Band-to-band tunneling transistors, full-band and atomistic quantum transport, steep subthreshold.

Tunnel field-effect transistors - update

“…Low subthreshold swing is apparent for V G < kT/q. Si [29] Si [26] s-Si [31] 16 nm FinFET [10] Si, Ghandi (NUS) 16 Figure 6: Simulated TFET subthreshold swing versus drain current per micron from [8]. The TFETs simulations are from Agarwal [16], Avci [17,18], Sylvia [19], Lu [20], Pillai [21], Koswatta [22], Zhang [23,24], Li [25], with FinFET data from Wu [13].…”

Experimental examination of tunneling paths in SiGe/Si gate-normal tunneling field-effect transistors

“…This implies that TFETs may be operated at lower supply voltages resulting in lower overall power consumption 1,2 . However, soon after the fabrication of the first TFETs consisting of simple lateral pin-structures, it was realized that they cannot reach on-current values as high as MOSFETs 3 . As a potential solution the idea of "vertical" or "gate-normal" tunneling emerged, in which the tunneling direction is parallel to the electric field of the gate 4,5 .…”

“…However, lateral tunneling may cause severely increased off-state leakage and heavily degraded turn-on abruptness. A solution proposed by Agarwal et al 3 consists of thinning the channel on the drain side by pushing up the buried oxide and hence suppressing lateral tunneling to a very large extent. This approach was used with altered geometry in combined experimental and theoretical studies on a III/V platform [6][7][8] .…”

“…Though it isn't the intention of our work to reach record Ion, one may wonder about the main cause preventing Ion from reaching high values of 100 μA/μm or more targeted by the semiconductor industry 3 . With large dgs-values of 4.5 µm, 7.25 µm and 9.25 µm for transistors increasing in size, series resistance (Rs) in the channel could play a role.…”

InAs/AlGaSb heterojunction tunnel field‐effect transistor with tunnelling in‐line with the gate field

“…For example, MOSFET-like current drive (1.9 mA/μm with 0.4 V supply) has been predicted for broken-gap InAs/GaSb heterojunctions [2] in a gate-all-around 1-D wire geometry due to its lower bandgap and higher effective mass relative to Si. Vertical transistor geometries have also been proposed to enable better gate electrostatics, higher current drive, and lower off-state leakage relative to lateral TFET geometries [3,4].…”