LDO With Improved Common Gate Class-AB OTA Handles any Load Capacitors and Provides Fast Response to Load Transients

Răducan, Cristian; Grajdeanu, Alina-Teodora; Plesa, Cosmin-Sorin; Negoiță, Andrei; Ţopa, Marina

doi:10.1109/tcsi.2020.3012376

Cited by 24 publications

(69 citation statements)

References 29 publications

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“…The smallest quiescent current is reported by [13] and it achieves better FOMs value than the LDO presented here. In fact, the circuit we introduced in [13] is a particular case of the topology shown in Fig.…”

Section: Comparison With State-of-the-artmentioning

confidence: 72%

“…27 depicts the load transient response for the maximum CL value, 1 μF. The test setup used for these measurements was similar to the one described in [13].…”

Section: Measurements Resultsmentioning

confidence: 99%

“…Instead, we developed a version of the approximate graphical analysis method introduced in [11] and [12], and developed in [13]. Its main points are: -a circuit with multiple feedback loops can be simplified iteratively, starting from the inner loop and moving outwards.…”

Section: ) Error Amplifier With High Slew Ratementioning

confidence: 99%

“…𝑍 𝑡_𝐼𝑁𝑁𝐸𝑅 (11) 𝐼𝑓 𝐿𝐺 𝐼𝑁𝑁𝐸𝑅 ≪ 1, 𝐿𝐺 𝐿𝐷𝑂 = 𝐺 𝑚𝐸𝐴 𝑎 𝐼𝑁𝑁𝐸𝑅 (12) 𝐼𝑓 𝐿𝐺 𝐼𝑁𝑁𝐸𝑅 ≫ 1, 𝐿𝐺 𝐿𝐷𝑂 = 𝐺 𝑚𝐸𝐴 1 𝑓 𝐼𝑁𝑁𝐸𝑅 (13) For the LDO to be stable, the inner feedback circuit shown in Fig. 6(c) must be stable, as well.…”

Section: ) Error Amplifier With High Slew Ratementioning

confidence: 99%

“…2, with a circuit implementation optimized for ultra-low power consumption. The error amplifier in [13] employs a common-gate input stage, to maximize the speed. Thus, it consumes only 0.7µA and its transient response is slightly below 300mV for a load jump of 100mA.…”

Section: Comparison With State-of-the-artmentioning

confidence: 99%

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Fast LDO Handles a Wide Range of Load Currents and Load Capacitors, up to 100 mA and Over 1μF

et al. 2022

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This paper proposes a low dropout voltage regulator (LDO) that exhibits both a fast response to load transients and the ability to handle practically any load capacitor. Starting from a typical LDO topology, an error amplifier (EA) that drives a PMOS pass transistor and a passive feedback network, we inserted a novel circuit, with the input AC-coupled to the LDO output and the output connected directly to the pass transistor gate. This circuit creates an inner feedback loop able to react quicker than the main feedback loop to variations in the output voltage, and appropriately inject or sink current to/from the gate node. Moreover, the inner feedback loop helps reduce the equivalent small-signal impedance at the LDO output, which in turn reduces the impact the pole associated with the output node has on the LDO stability. A compact circuit implementation of this topology is presented in this paper: it combines the proposed fast transient & frequency compensation circuit with a high slew-rate EA. The resulting LDO was integrated in a 130 nm standard CMOS technology. The measurement results are in good agreement with simulations and validate the concept and design. The LDO provides a steady 1 V output with the supply voltage varying from 1.2 V to 1.5 V and the load current going up to 100 mA. Its fast response to load transients helps maintain the output voltage overshoot and undershoot below 250 mV for CL = 0 and under 60 mV for CL =1 μF, when the load current varies between 1 μA and 100 mA in 1 μs. The LDO requires only 6.2 μA of quiescent current and occupies 0.018 mm 2 of die area.INDEX TERMS any load capacitor, fast-transient LDO, high slew-rate error amplifier, fast response to load transients

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Section: Comparison With State-of-the-artmentioning

confidence: 72%

“…27 depicts the load transient response for the maximum CL value, 1 μF. The test setup used for these measurements was similar to the one described in [13].…”

Section: Measurements Resultsmentioning

confidence: 99%