Lateral growth control in excimer laser crystallized polysilicon

Mariucci, L.; Carluccio, R.; Pecora, A.; Foglietti, V.; Fortunato, G.; Legagneux, Pierre; Pribat, Didier; Sala, Dario Della; Stoëmenos, J.

doi:10.1016/s0040-6090(98)01174-2

Cited by 48 publications

(32 citation statements)

References 17 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…This manifests itself by a rapid increase in overall current at high drain bias due to the bipolar amplification of charge generated by impact ionization. Several fabrication techniques [10][11][12][13] have been developed which improve the quality of the film in an attempt to ensure the same number of grain boundaries (or none) are present in the channel of every device and advanced device structures have been implemented in order to mitigate the kink effect. Device engineering techniques include: lightlydoped drain (LDD) [14][15]; gate-overlapping lightly-doped drain (GOLDD) [16] and drain field plate [17].…”

Section: Introductionmentioning

confidence: 99%

Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors

Sporea

Trainor

Young

et al. 2012

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

-Source-gated transistors (SGTs) have potentially very high output impedance and low saturation voltages, which make them ideal as building blocks for high performance analog circuits fabricated in thin-film technologies. The quality of the saturation is greatly influenced by the design of the field-relief structure incorporated into the source electrode. Starting from measurements on self-aligned polysilicon structures, we show through numerical simulations how the field plate design can be improved. A simple source field plate around 1µm long situated several tens of nm above the semiconductor can increase the low-voltage intrinsic gain by more than two orders of magnitude and offers adequate tolerance to process variations in a moderately scaled thin-film SGT.

show abstract

Section: Introductionmentioning

confidence: 99%

Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors

Sporea

Trainor

Young

et al. 2012

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

show abstract

“…Consequently, nonuniform and randomly distributed poly-Si grains will result in large variation of TFT performance when the laser energy density is controlled in the SLG regime, particularly, for smalldimension TFTs [13], [14]. Thus, many laser crystallization methods have been proposed to produce large grains with uniform grain size distribution, including sequential lateral solidification [15], the grain filters method [16], capping the reflective or antireflective layer [17], phase-modulated ELC [18], dual-beam excimer laser annealing (ELA) [19], double-pulsed laser annealing [20], selectively floating a-Si active layer [21], continuous-wave laser lateral crystallization [22], selectively enlarging laser crystallization [23], and so on. However, some of them are not readily attached to existing ELA systems or are problematic for circuit layout due to the anisotropy of the grain boundary spacing.…”

Section: Introductionmentioning

confidence: 99%

High-Performance Short-Channel Double-Gate Low-Temperature Polysilicon Thin-Film Transistors Using Excimer Laser Crystallization

Tsai

Wei

Lee

et al. 2007

IEEE Electron Device Lett.

View full text Add to dashboard Cite

In this letter, high-performance low-temperature polysilicon thin-film transistors (TFTs) with double-gate (DG) structure and controlled lateral grain growth have been demonstrated by excimer laser crystallization. Via a proper excimer laser condition, along with the a-Si step height beside the bottom gate, a superlateral growth of Si was formed in the channel length plateau. Therefore, the DG TFTs with lateral silicon grains in the channel regions exhibited better current-voltage characteristics, as compared with the conventional top-gate ones. The proposed DG TFTs (W/L = 1/1 µm) had the field-effect mobility exceeding 550 cm 2 /V · s, an ON/OFF current ratio that is higher than 10 8 , superior short-channel characteristics, and higher current drivability. In addition, the device-to-device uniformity could be improved since grain growth could be artificially controlled by the spatial plateau structure. Index Terms-Double gate (DG), excimer laser crystallization (ELC), lateral grain growth, thin-film transistor (TFT).

show abstract

“…Such condition can be realized by, for example, linear beam-intensity modification by mask projection, 11 phase-shift element, 12 or optical lens. 13 Alternatively creating masking layer on the surface 14 can also lead the local melting of the Si film.…”

Section: D Location-control Of Grains With Structural Variation By Pmentioning

confidence: 99%

Property of single-crystalline Si TFTs fabricated with μ-Czochralski (grain filter) process

et al. 2003

View full text Add to dashboard Cite

Formation of TFTs inside location-controlled large Si grains with a low temperature process is an attractive approach for realizing system-circuit integration with displays on a large glass substrate. Local structural variations of the substrate using photolithography allows an accurate location-control of the large Si grains in excimer-laser crystallization. Single-crystalline Si (c-Si) TFTs was formed inside a location-controlled large (6 µm) grain by µ-Czochraski process of a-Si film. The c-Si TFTs showed field effect mobility of 450 cm 2 /Vs on average. Crystallization characteristics, spread of the TFT characteristics and effects of process parameters will be reviewed and discussed.

show abstract

Lateral growth control in excimer laser crystallized polysilicon

Cited by 48 publications

References 17 publications

Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors

Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors

High-Performance Short-Channel Double-Gate Low-Temperature Polysilicon Thin-Film Transistors Using Excimer Laser Crystallization

Property of single-crystalline Si TFTs fabricated with μ-Czochralski (grain filter) process

Contact Info

Product

Resources

About