Field Plate Optimization in Low-Power High-Gain Source-Gated Transistors

Abstract

-Source-gated transistors (SGTs) have potentially very high output impedance and low saturation voltages, which make them ideal as building blocks for high performance analog circuits fabricated in thin-film technologies. The quality of the saturation is greatly influenced by the design of the field-relief structure incorporated into the source electrode. Starting from measurements on self-aligned polysilicon structures, we show through numerical simulations how the field plate design can be improved. A simple source field plate around 1µm long situated several tens of nm above the semiconductor can increase the low-voltage intrinsic gain by more than two orders of magnitude and offers adequate tolerance to process variations in a moderately scaled thin-film SGT.

Low-Field Behavior of Source-Gated Transistors

“…However, the current will be sensitive to changes in source barrier height, ϕ B . More importantly, the current will be sensitive to drain voltage and its respective electric field, which will act to lower the effective height of the barrier leading to the deterioration of the output impedance in saturation unless a field relief structure is incorporated [8,15] In low-field mode, however, the situation is very different. In this case, provided that the current under the pinch-off region (I 2 in Figure 1) is easily supplied by the saturation current of the reverse-biased source barrier, the change of current with gate voltage will depend on the characteristics of the pinch-off region.…”

“…In the high-field mode of operation, however, the current is sensitive to drain field [2,8,15], therefore some form of field relief at the drain end of the source is required. This is easily done in silicon technology [3] but in other systems, such as solutionprocessed organics, introducing field relief is more problematic.…”

Temperature dependence of the current in Schottky-barrier source-gated transistors

“…Regardless of the current injection mechanism at the source 3,5,6 , the intentional use of a source barrier in an otherwise conventional TFT structure leads to major differences in the transistor (output) characteristic: low-voltage saturation 2,3,[7][8][9][10] , flat saturated output characteristics 3,7,9,11 , tolerance to geometrical variations 4,12 , bias stress stability 13 and improved current levels in low mobility materials 14 . Both digital 15 and analog applications 14,[16][17][18][19] could benefit from using these devices, in terms of amplification, energy efficiency, uniformity of electrical performance, and reliability.…”

“…Thus, at high electric field, the barrier in this region of the source can be modulated, and since the reverse current of the contact is exponentially dependent on effective barrier height 20 , large changes in current (I 1 ) can be effected by changing the potential on the gate. The drain bias, however, has a similar effect on this area of the source, so without purposeful screening of the source edge from drain electric field 11 , output characteristics have a drain voltage dependence of the current in saturation 5,9 .…”

“…When I 2 dominates, the flatness of the output characteristics is superior without the need for a specially-designed field relief structure 5,11 . Long source devices should have improved intrinsic gain characteristics.…”