Lateral and Vertical Hall Microsystems

Vanha, R. Steiner; Baltes, H.

doi:10.1002/1616-8984(200011)8:1<95::aid-seup95>3.0.co;2-a

Cited by 3 publications

(2 citation statements)

References 34 publications

(63 reference statements)

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“…Ways to reduce stress acting on the sensor structure are, e.g., the use of materials with matching coef®cient of thermal expansion or the use of soft, elastic die attach materials. In addition, electronic compensation techniques, such as the spinning current technique in Hall sensors [7], are employed for offset reduction.…”

Section: Challenges In Microsensor Packagingmentioning

confidence: 48%

Microsensor packaging

Brand¹,

Baltes²

2002

Microsystem Technologies

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Packaging is crucial for the success of microsensors and microsystems, and typically a major, if not dominating cost component. Bene®ting from packaging methods for integrated circuits (IC), microsystem packaging currently strongly relies on customized solutions. The paper summarizes challenges in microsensor and microsystem packaging and brie¯y discusses current packaging trends. In the second part of the paper, a packaged low-cost CMOS thermal imager is presented. Its packaging is based on the direct attachment of a silicon infrared ®lter onto the CMOS sensor die. The ®nal microsystem is further packaged in a plastic ball grid array (BGA) enabling subsequent assembly by standard surface mount technology.

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