Large-Signal Modeling of High-Speed InP DHBTs using Electromagnetic Simulation Based De-embedding

Abstract

We report on a consistent large-signal and small-signal modeling and parameter extraction method for high-speed InP DHBT valid to 110 GHz. Electromagnetic simulation is applied to predict the embedded network model caused by pad parasitics. Applying direct parameter extraction on the de-embedded device response leads to accurate small-signal model description of the InP DHBT. We have solved the problem of consistent transit time modeling by a two step process. A parameter extraction approach is described for the Agilent ADS2004A HBT model, which assures consistency between large-signal and bias-dependent small-signal modeling.

InGaAs/InP DHBT small‐signal model up to 325 GHz with two intrinsic base resistances

“…Because intrinsic base resistances are always considered as weak bias-dependent parameters, 23 we extract them under cutoff conditions as initial normal-bias resistances. Omitting the two small verification capacitances C bev and C cev , resistances can be calculated by (17) and (18). This simplification should be made at low frequency, because the shunt capacitance will bring errors at high frequency.…”

“…It is necessary to improve the high-frequency small-signal equivalent-circuit model for these applications. Up to now, many incremental works have been reported such as extrinsic parameter equivalent-circuit topology improvements, [15][16][17] high-frequency measurement and de-embedding methods, [18][19][20] parameter extraction method improvements of millimeter-wave transistors, [15][16][17][21][22][23][24][25] substrate and parasitic transistor parasitics extraction (for SiGe devices), 22 improvements of special biases (cold, cutoff, open-collector, and overdriven I b biases) parasitics extraction methods, and consideration of de-embedding residual parameters. 15,23 Furthermore, compared with planar HBTs, THz InP-based triple-mesa HBTs/DHBTs are different in material, device construction, and size.…”

Submicron InP DHBT Technology for High-Speed High-Swing Mixed-Signal ICs

“…Carbon-doped 28 nm graded Base and a 5x10 16 cm -3 doped 130-250 nm composite Collector. As the major contribution to F T is the transit time in both Base and Collector, optimization has focused on the basecollector junction; we need to balance short transit time with breakdown voltage [which is a specific advantage of DHBTs], Kirk effect/blocking effect due to conduction band discontinuity and inter-valley scattering ( Figure 7).…”

“…Based on the methodology described in [16][17][18], parameters for an UCSDlike model were extracted from various bias small-signal measurements. Figure 9 illustrates the model accuracy, for both small-signal and C BC modulation.…”

Modeling technology of InP heterojunction bipolar transistor for THz integrated circuit

“…[13][14][15][16] In 2006, they presented a high-speed InP double-heterojunction bipolar transistor (DHBT) large-signal model and the parameter extraction method up to 110 GHz. 13 In this paper, 3D electromagnetic (EM) simulation is applied for the prediction and de-embedding of the parasitic networks induced by pads and outgoing structures. Pad parasitic effects are clearly modeled with equivalent circuit and are shown in Figure 1.…”