Knowledge-Guided Methodology for Third-Party Soft IP Analysis

Singh, Bhanu Pratap; Shankar, Arunprasath; Wolff, Francis; Weyer, Daniel; Papachristou, C.; Negi, Bhanu

doi:10.1109/vlsid.2014.49

Cited by 6 publications

(6 citation statements)

References 5 publications

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“…Knowledge based methods are different from the methods mentioned above [4], [5]. These methods build a knowledge base for RTL code and specification and identifies the circuits that exactly match the specification.…”

Section: A Related Workmentioning

confidence: 99%

“…These methods build a knowledge base for RTL code and specification and identifies the circuits that exactly match the specification. Results in [4], [5] show that, in most cases, the identification coverage is larger than 60%, and thus the workload for manual check can be reduced.…”

Section: A Related Workmentioning

confidence: 99%

“…FASTrust can be regarded as another kind of knowledge based method. Unlike the knowledge based methods proposed in [4], [5] which built RTL base and spec base, and tried to identify all benign functional modules, FASTrust aims to directly identify malicious circuits. We find several features in the flip-flop level CDFG that can represent different HT types.…”

Section: B Motivationmentioning

confidence: 99%

“…However, when such agreement is not available (and it is the common case, at least for today), it is essential to verify whether 3PIPs contains HTs. Knowledge-guided methods analyze the differences between the specification and the procured IP core, and can identify trusted parts in 3PIPs [4], [5]. Redundancy based methods diversify the sources of 3PIPs and check the equivalence between the results from different version 3PIPs which should have the same functionality [6]- [8].…”

Section: Introductionmentioning

confidence: 99%

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FASTrust: Feature analysis for third-party IP trust verification

Song

Chen

Zhang

et al. 2015

2015 IEEE International Test Conference (ITC)

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Third-party intellectual property (3PIP) cores are widely used in integrated circuit designs and it is essential to ensure their trustworthiness. Existing hardware trust verification techniques suffer from high computational complexity, low extensibility, and inability to detect implicitly-triggered hardware trojans (HTs). To tackle the above problems, in this paper, we present a novel 3PIP trust verification framework, namely FASTrust, which conducts HT feature analysis on the flip-flop level control-data flow graph (CDFG) of the circuit. FASTrust is not only able to identify existing explicitly-triggered and implicitly-triggered HTs appeared in the literature in an efficient and effective manner, but more importantly, it has the unique advantage of being scalable to defend against future and more stealthy HTs by adding new features to the system.

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Section: A Related Workmentioning

confidence: 99%

Section: A Related Workmentioning

confidence: 99%

Section: B Motivationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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FASTrust: Feature analysis for third-party IP trust verification

Song

Chen

Zhang

et al. 2015

2015 IEEE International Test Conference (ITC)

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“…For example, "floating-point add" is a concept with"precision" and "single/double" as its associated feature and attributes respectively. For our prior work on spec analysis [7] and spec vs. RTL cross-correlation [8], ontologies were manually created by our experts which was rather a time-consuming process. Thus, there is a necessity to automate this process which would pave way for faster knowledge extraction and acquisition.…”

Section: Introductionmentioning

confidence: 99%

Ontology-guided Conceptual Analysis of Design Specifications

Shankar

Singh

Wolff

et al. 2014

Proceedings of the 51st Annual Design Automation Conference

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The integration of reusable IP blocks/cores is a common process in system-on-chip design and involves manually comparing/mapping IP specifications against system requirements. The informal nature of specification limits its automatic analysis. Existing techniques fail to utilize the underlying conceptual information embedded in specifications. In this paper, we present a methodology for specification analysis, which involves concept mining of specifications to generate domain ontologies. We employ a semi-supervised expert system with semantic analysis capability to create a collaborative framework for cumulative knowledge acquisition. Our system then uses the generated ontologies to perform component retrieval, drop-in-replacement analysis and design vs. test-plan comparisons. We demonstrate our approach by evaluating several IP specifications.

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