2014
DOI: 10.1007/978-3-319-12060-7_9
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Khudra: A New Lightweight Block Cipher for FPGAs

Abstract: Abstract. The paper shows that designing lightweight block ciphers for the increasingly popular Field Programmable Gate Arrays (FPGAs) needs a new revisit. It shows that due to the underlying FPGA architecture many popular techniques for lightweight block ciphers which work on Application Specific Integrated Circuits (ASICs) does not apply to FPGAs. The paper identifies new methods and design criteria for lightweight block ciphers operating on FPGAs. Using these guidelines, a new block cipher Khudra based on t… Show more

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Cited by 28 publications
(25 citation statements)
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“…However, as in this evaluation, we mainly focus on the area, and power consumption, we do not elaborate into those design alternatives. Interested readers can look into [13]. Similar observations can be made for the implementations on FPGA platforms also.…”
Section: Asic Design Flow and Metricsmentioning
confidence: 65%
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“…However, as in this evaluation, we mainly focus on the area, and power consumption, we do not elaborate into those design alternatives. Interested readers can look into [13]. Similar observations can be made for the implementations on FPGA platforms also.…”
Section: Asic Design Flow and Metricsmentioning
confidence: 65%
“…The area requirement for KHUDRA is slightly lesser, while the better throughput for PRESENT is due to less number of rounds, followed by SPECK. However, as mentioned in the paper [13], the throughput of KHUDRA can be improved significantly at the cost of slight increase in area. The inner rounds could be unrolled at slight increase in both area and latency (note that each round is a small 16×16 Feistel structure, using 4×4 SBoxes, and this reduces the overall clock cycles increasing the throughput significantly.…”
Section: Asic Design Flow and Metricsmentioning
confidence: 99%
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