Karnaugh Maps of Logical Systems and Applications in Digital Circuit Design

Wang, Cailu; Tao, Yuegang

doi:10.1007/s00034-019-01214-x

Cited by 7 publications

(11 citation statements)

References 22 publications

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“…The STP based method has been presented in ([11], Theorem IV.6) for obtaining the algebraic expression of BCNs by introducing the swap matrix, dummy matrix and power reducing matrix, which has a very high computational complexity of O(2 6(m+n) n) (see [3], Theorem 1). Resently, Sarda et al [26,27] proposed a Khatri-Rao product based method to obtain such an algebraic expression.…”

Section: Lemma 2 ([11]mentioning

confidence: 99%

“…After studying a logical dynamic system in the algebraic state space, it is necessary to convert the algebraic expression back to the logic expression in order to design digital circuits to implement the desired control functions (see, e.g., [3,5]). For a Boolean function, it is claimed in [16] that 'converting an algebraic form back to logical form is not an easy job', and a 'mechanical procedure' is provided for converting the algebraic expression back to the logic expression as below.…”

Section: From Algebraic Expression To Logic Expressionmentioning

confidence: 99%

“…Boolean control network (BCN) is a logical system pioneered by Kauffman in [1] for initially describing genetic regulatory networks, which provides useful modeling tools for dynamical systems whose state-variables take only two values ('True' or 'False'). With the development of information technologies, BCNs have become an effective way to analyze and design circuits by algebraic means in terms of logic gates, and have served as a fundamental approach to digital circuit design, computer programming, and so on (see, e.g., [2][3][4][5][6][7]). With the development of digital circuit, the research on logic synthesis becomes particularly important.…”

Section: Introductionmentioning

confidence: 99%

“…Bandyopadhyay et al [4] analyzed the effects of different graph-based intermediate representations, inclutding binary decision diagram, and-inverter graph and majority inverter graph, and their usability in making efficient circuit realisations. Wang and Tao [3] introduced the Karnaugh maps of logical systems and used in the analysis and design of clocked sequential circuits and in the simplification of multioutput gate circuits.…”

Section: Introductionmentioning

confidence: 99%

“…The computation complexity is a series problem in directly calculating the network transition matrix based on STP, which frames a limitation on the application of algebraic state-space approach. It has been calculated in [3] that the complexity of STP based method is O(2 6(m+n) n). Recently, Sarda et al [26,27] proposed a Khatri-Rao product based method to transform the logical form of a BCN into a discrete time bilinear system, which has a complexity of O(2 m+2n ).…”

Section: Introductionmentioning

confidence: 99%

See 4 more Smart Citations

Conversion between Logic and Algebraic Expressions of Boolean Control Networks

Wang

Tao

2020

Applied Sciences

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The conversion between logic and algebraic expressions of Boolean control networks plays a worthy role in the analysis and design of digital circuits. In this paper, for a single Boolean function, a direct conversion between the minterm canonical form and the structure matrix is provided. For a Boolean control network consisting of systems of Boolean functions, two algorithms are developed to achieve the mutual conversion between the logic and algebraic expressions. The presented algorithms decrease exponentially the complexity of the semi-tensor product based method. Some numerical examples are given to demonstrate the algorithms and to compare our method with the existing ones.

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Section: Lemma 2 ([11]mentioning

confidence: 99%

Section: From Algebraic Expression To Logic Expressionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Conversion between Logic and Algebraic Expressions of Boolean Control Networks

Wang

Tao

2020

Applied Sciences

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Design and analysis of ultra‐low power 18T adaptive data track flip‐flop for high‐speed application

Mishra

Vaithiyanathan

Chopra

2021

Circuit Theory & Apps

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Summary This paper proposes a novel master slave (MS) flip‐flop design achieved by using only 18 transistors with a single‐phase clock and mixed topology. This design has lowest complexity, so flip‐flop basically focuses on the performance issue such as delay (TCQ) and average power consumption and compared with the other existing logic structured flip‐flops. The proposed circuit is implemented at 65‐nm Complementary Metal‐Oxide Semiconductor (CMOS), and 18‐nm finFET technology node using cadence virtuoso. The proposed flip‐flop architecture have outperformed transmission gate flip‐flop (TGFF) in terms of power (i.e., 74.52%). It is also showing improvement in terms of power as compared to 18‐transistor single‐phase clocking (18TSPC). This work also enhances the speed by reducing the delay minimum of 11.28% and PDP minimum of 37.18%. By using adaptive pass transistors topology to construct flip‐flop, the total area of the proposed flip‐flop reduces by a minimum of 4.78% with respect to 18TSPC, and also with the other flip‐flops reported in this paper. The proposed circuit can work properly within the frequency range up to 2‐GHz clock frequency. Monte Carlo simulations of Power and C to Q delay have been performed for 1000 samples.

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