IVLBC: An Involutive Lightweight Block Cipher for Internet of Things

Huang, Xiantong; Li, Lang; Yang, Jinling

doi:10.1109/jsyst.2022.3227951

Cited by 15 publications

(2 citation statements)

References 37 publications

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“…and divided into 16-bit K j (0 j 7). The division process is shown in equation (5). The key schedule is similar to PRESENT, which allows for a lowresource and secure hardware implementation.…”

Section: Addroundconstantmentioning

confidence: 99%

“…In recent years, many excellent lightweight block ciphers have been presented to meet the encryption needs of devices with resource-constrained. These include SKINNY [3], Shadow [4], IVLBC [5], SAND [6], CRAFT [7], HDLBC [8] and so on. Many IoT devices are powered by batteries, such as active Radio Frequency Identification(RFID) tags, battery-operated portable devices and sensor nodes.…”

Section: Introductionmentioning

confidence: 99%

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GFLE: a low-energy lightweight block cipher based on a variant of generalized Feistel structure

Hu,

Li,

Huang

et al. 2024

Phys. Scr.

Self Cite

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Low-energy lightweight block ciphers are essential for applications with extremely resource-constrained to reduce energy and maintain security. The trade-off between diffusion property and area is a widely studied issue in the design of low-energy block ciphers. In this paper, a low-energy lightweight block cipher named as GFLE is presented. The core cipher of GFLE uses a variant of the Generalized Feistel Structure (GFS) with 4-branch, which combines the Type-II GFS with the simplified Lai-Massey. The DRmax of GFLE has a one-round improvement over the Type-II GFS optimized by Suzaki et al. and the security margin is achieved in a shorter number of rounds. Moreover, an S-box with low-energy and good cryptographic properties is proposed by searching combinations based on gate-level circuits using a depth-first strategy. It exhibits better security properties and hardware performance compared to other S-boxes. The block cipher GFLE is implemented in ASIC with UMC UMC 0.18 μm. It has been proved that the energy of GFLE is lower than Midori, WARP, SKINNY, CRAFT, etc. in unified encryption and decryption (ED) circuits. GFLE reduces energy by 61.59% compared with SKINNY. The results show that GFLE in ED circuits consumes only 1596 Gate Equivalents (GEs) and 6.36 μJ/bit in area and energy, respectively.

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Section: Addroundconstantmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

GFLE: a low-energy lightweight block cipher based on a variant of generalized Feistel structure

Hu,

Li,

Huang

et al. 2024

Phys. Scr.

Self Cite

View full text Add to dashboard Cite

show abstract

LPHD: A low power and high diffusion lightweight block cipher

Xu,

Li,

Huang

2024

Circuit Theory & Apps

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Smart door locks pose a large number of threats such as network attacks. Its storage area and power of cipher are severely limited because the wireless nodes of smart door locks are mostly battery‐powered. Therefore, effective security solutions are urgently needed. In this paper, a new lightweight block cipher with low power named LPHD is proposed to ensure the security of the master control chip of the smart door lock terminal. We design a scheme of low power S‐box and construct the two‐stage permutation layer (TP structure) suitable for LPHD by filtering the sets of 8‐bit permutations. LPHD proposes a variant of the 8‐branch generalized Feistel structure (GFS) to realize that the bits of all branches are affected in one encryption round. The problem of slow diffusion in the standard Feistel structure is solved. The key schedule adopts the nonlinear design and reuses the encryption process of LPHD. It improves the security of the cipher and reduces hardware overhead. Moreover, we evaluate the hardware implementation and security of LPHD. The results show that LPHD for the unified encryption and decryption circuits requires only 1276 Gate Equivalents (GEs) and 1.914 W on UMC 0.18 m, which is better than other lightweight block ciphers such as SKINNY, PRESENT, and IVLBC. In summary, LPHD provides sufficient security for the master control chip of the smart door lock terminal.

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Novel optimized implementations for the Piccolo cipher based on field‐programmable gate arrays

Feng,

Wei,

Wei

2024

Circuit Theory & Apps

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In the era of the highly pervasive Internet of Things (IoT), the optimized implementation of lightweight cryptographic algorithms for protecting data security has extensively received attention, for instance, the Piccolo cipher. Piccolo is an ultra‐lightweight block cipher designed for extremely resource‐constrained devices. Currently, many optimized implementations of Piccolo have been proposed; however, these implementations are heavily rely on optimizing different architectures. Actually, these implementation schemes have all neglected the optimization of the core components. How to achieve the new optimized implementation of the Piccolo cipher (via both the architectures and the core components) appears to be an interesting problem. In this article, new circuit structures for components (key schedules and round functions) of the Piccolo are first proposed using fewer logic gates. Based on these circuit structures, three architectures (iterative, integrated iterative, and scalar) are proposed to maximize implementation performances. To demonstrate their effectiveness and practicality, these architectures are simulated and synthesized on different field‐programmable gate arrays (FPGA) devices. Compared with the existing architectures of Piccolo, the results indicate that the iterative architectures and the integrated iterative architecture provide a better trade‐off between area and throughput, and the scalar architectures provide the highest throughput. Especially for Piccolo‐128, the area of its iterative architecture is 30 look‐up tables (LUTs) and 22 slices less than the best known implementation; the throughput and efficiency are 68.56% higher and twice higher than the best known implementation, respectively. Compared with other block ciphers, the efficiency and area‐delay product of the Piccolo‐128 iterative architecture outperform PRESENT, GIFT, SIMON, Midori, SIMON, and SIMECK. Compared with the best results, its encryption efficiency has increased by 31.53%, and the area‐delay product has decreased by 44.63%.

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IVLBC: An Involutive Lightweight Block Cipher for Internet of Things

Cited by 15 publications

References 37 publications

GFLE: a low-energy lightweight block cipher based on a variant of generalized Feistel structure

GFLE: a low-energy lightweight block cipher based on a variant of generalized Feistel structure

LPHD: A low power and high diffusion lightweight block cipher

Novel optimized implementations for the Piccolo cipher based on field‐programmable gate arrays

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