IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults

Pan, Songjun; Hu, Yu; Li, Xiaowei

doi:10.1109/tvlsi.2011.2134115

Cited by 35 publications

(26 citation statements)

References 35 publications

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“…Finally, from the simulation traces obtained in the injection experiments, failures and latent errors have been registered, and the influence of different fault parameters has been analyzed. Other works in the literature have studied the impact of intermittent faults at higher abstraction levels (application programs) [9], [10], and they all show similar results as in [6], [7] and [8] regarding the influence of fault parameters and sensitivities.…”

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confidence: 59%

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

et al. 2016

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Abstract-As scaling is more and more aggressive, intermittent faults are increasing their importance in current deep submicron complementary metal-oxide-semiconductor (CMOS) technologies. This work shows the dependability assessment of a fault-tolerant computer system against intermittent faults. The applied methodology lies in VHDL-Based Fault Injection, which allows the assessment in early design phases, together with a high level of observability and controllability. The evaluated system is a duplex microcontroller system with cold stand-by sparing. A wide set of intermittent fault models have been injected, and from the simulation traces, coverages and latencies have been measured. Markov models for this system have been generated and some dependability functions, such as reliability and safety, have been calculated. From these results, some enhancements of detection and recovery mechanisms have been suggested. The methodology presented is general to any fault-tolerant computer system. Index Terms-

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confidence: 59%

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

et al. 2016

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“…On the other hand, [27] defines a new metric, called IVF (Intermittent Vulnerability Factor), in order to study the impact of intermittent faults in the internal blocks of microprocessors. For the injection experiments, they use a model of the Alpha 21260, a DEC RISC microprocessor.…”

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confidence: 99%

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

et al. 2014

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Gracia-Morán, J.; Baraza Calvo, JC.; Gil Tomás, DA.; Saiz-Adalid, L.; Gil, P. (2014 > REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) < 1Abstract-With the scaling of CMOS technology to the submicron range, designers have to deal with a growing number and variety of fault types. In this way, intermittent faults are gaining importance in modern VLSI circuits. The presence of these faults is increasing due to the complexity of manufacturing processes (which produce residues and parameter variations), together with special aging mechanisms. This work presents a case study of the impact of intermittent faults on the behavior of a RISC microprocessor. We have carried out an exhaustive reliability assessment by using VHDL-based fault injection. In this way, we have been able to modify different intermittent fault parameters, to select various targets, and even, to compare the impact of intermittent faults with those induced by transient and permanent faults.

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“…Despite the significant advantages of functionality test based on data paths, structural test of microprocessor [4] that concentrates on operation of control logic is highly required. In [5] determining and characterising faults and their vulnerability of microprocessor structure are studied and implemented. Based on the functionality and structural test aspects, a new approach to detect stuck-at-fault in MUX block for instruction selection has been implemented here.…”

Section: Overviewmentioning

confidence: 99%

Instruction based Built-in-Testing of Instruction Select Multiplexer in Arithmetic Logic Unit

Tsoozol¹,

Börcsök²,

Schwarz³

2012

J. Phys.: Conf. Ser.

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Abstract. Due to the complexity of microprocessor, an efficient testing is a crucial point and serious challenge in safety systems. A new instruction opcode for ALU based Built-In-Test (BIT) is proposed in this paper. With this novel method stuck-at-fault in Multiplexer (MUX) for Arithmetic Logic Unit (ALU) can be determined. A model that consists of the command and faulty states is developed. According to the designed state model, an algorithm and pseudo program that tests the stuck-at-fault in MUX is implemented and described in this paper.

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IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults

Cited by 35 publications

References 35 publications

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

Injecting Intermittent Faults for the Dependability Assessment of a Fault-Tolerant Microcomputer System

Effects of Intermittent Faults on the Reliability of a Reduced Instruction Set Computing (RISC) Microprocessor

Instruction based Built-in-Testing of Instruction Select Multiplexer in Arithmetic Logic Unit

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