Irredundant Algorithms for Traversing Directed Graphs: The Nondeterministic Case

Burdonov, Igor; Kossatchev, A. S.; Kuliamin, Victor V.

doi:10.1023/b:pacs.0000013436.72070.95

Cited by 16 publications

(5 citation statements)

References 24 publications

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“…The architecture includes stimuli generators (including FSM based ones, in which irredundant traversal algorithms are implemented [12]), oracle (reaction checker), as well as coverage tracker and verification report generator (Fig. 2).…”

Section: Architecture Of Single Test Systemmentioning

confidence: 99%

Developing test systems for multi-modules hardware designs

Chupilko

2012

Program Comput Soft

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An approach aimed at creating test systems for complex hardware designs is proposed. The designs can be subdivided into modules and verified separately. The proposed architecture of separated verification systems and the way to combine them into a complex test system are based on simulation based verification of hardware designs. Components of the test systems are connected in a TLM like way (i.e., with the use of a high level commutation model based on messages), which simplifies merging of several test systems into a test system for the entire complex component.

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Section: Architecture Of Single Test Systemmentioning

confidence: 99%

Developing test systems for multi-modules hardware designs

Chupilko

2012

Program Comput Soft

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“…Although the abstract automaton is being dynamically constructed during the execution of the test scenario, the restrictions are imposed on the final abstract automaton. There are two main implementations of the test engine: a test engine that can traverse deterministic abstract automata [11] and a test engine that can traverse nondeterministic abstract automata [12]. The test engine for deterministic abstract automata demands the final abstract automaton to be finite, deterministic and strongly connected.…”

Section: Unitesk Technologymentioning

confidence: 99%

Model-Based Testing of Safety Critical Real-Time Control Logic Software

Gerlits

Хорошилов

2012

Electron. Proc. Theor. Comput. Sci.

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The paper presents the experience of the authors in model based testing of safety critical real-time control logic software. It describes specifics of the corresponding industrial settings and discusses technical details of usage of UniTESK model based testing technology in these settings. Finally, we discuss possible future directions of safety critical software development processes and a place of model based testing techniques in it

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“…The technology utilizes so-called implicit FSM descriptions that consist of current state function and stimuli iterator. To traverse FSM being defined implicitly, irredundant algorithms are used [5]. Such algorithms require strongly connectivity of the state graph and also FSM determinacy.…”

Section: Unitesk Technologymentioning

confidence: 99%

Constructing test sequences for hardware designs with parallel starting operations using implicit FSM models

Chupilko

2010

2010 East-West Design &Amp; Test Symposium (EWDTS)

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The paper concerns functional testing of hardware models using finite state machines (FSM). Test construction is done by traversing FSM state graph. In this paper we propose a technique for irredundant description of FSM models of parallel-pipeline designs. The technique allows to implicitly specify complex compositional FSM models and to automate construction of test sequences by composing several parallel operations into multi-stimuli.

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Irredundant Algorithms for Traversing Directed Graphs: The Nondeterministic Case

Cited by 16 publications

References 24 publications

Developing test systems for multi-modules hardware designs

Developing test systems for multi-modules hardware designs

Model-Based Testing of Safety Critical Real-Time Control Logic Software

Constructing test sequences for hardware designs with parallel starting operations using implicit FSM models

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