2013
DOI: 10.1149/05008.0003ecst
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(Invited) Twenty Five Years of Improvement of the Silicon Based TFT: From As-Deposited Polycrystalline Silicon to Nanostructured Silicon Deposited at Very Low Temperature

Abstract: 25 years of effort made in Rennes 1 University to improve the performance of silicon based thin film transistors are reviewed. The review is focused mainly on the technological progress. It starts from the end of 80's at the time where the main work was devoted to understand the physical properties of polycrystalline silicon that was used as active layer of transistors for the first time. It finishes with microcrystalline silicon TFTs fabricated at low temperature compatible with the use of transparent plastic… Show more

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Cited by 1 publication
(2 citation statements)
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References 19 publications
(21 reference statements)
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“…If is a drawback for a OSFET, (a) common gration by involving ain challengers are re expected to reach that prevent design compatible with the a process involving consists to stack the vertical channels on TFT a) and vertical applied thanks to the the layers of source, eposition techniques (LPCVD) for which an i doping gas introduction in in the same run. In additi changing the doping gas possibility to increase the potential decrease of the si same design rule for the sa Knowing that the driv width/length of the chann total drain-source current corresponds to the thickn equivalent width, leads to addition, this new architec VMOS or the DMOS of th in-situ doped layer can be grown [23][24][25][26]. in the LPCVD reactor, the three stacked layer dition, it is very simple to fabricate both type s [23].…”
Section: Quasi-vertical Tft Solutionmentioning
confidence: 99%
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“…If is a drawback for a OSFET, (a) common gration by involving ain challengers are re expected to reach that prevent design compatible with the a process involving consists to stack the vertical channels on TFT a) and vertical applied thanks to the the layers of source, eposition techniques (LPCVD) for which an i doping gas introduction in in the same run. In additi changing the doping gas possibility to increase the potential decrease of the si same design rule for the sa Knowing that the driv width/length of the chann total drain-source current corresponds to the thickn equivalent width, leads to addition, this new architec VMOS or the DMOS of th in-situ doped layer can be grown [23][24][25][26]. in the LPCVD reactor, the three stacked layer dition, it is very simple to fabricate both type s [23].…”
Section: Quasi-vertical Tft Solutionmentioning
confidence: 99%
“…in-situ doped layer can be grown [23][24][25][26]. in the LPCVD reactor, the three stacked layer dition, it is very simple to fabricate both type s [23].…”
Section: Ltfmentioning
confidence: 99%