2022
DOI: 10.3169/mta.10.52
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[Invited Paper] High Sensitivity Crystalline Selenium-based CMOS Image Sensor Using Avalanche Multiplication

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Cited by 1 publication
(3 citation statements)
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“…Because the re‐evaporation, pinholes, and peeling off from the beneath layer were caused by increasing residual stress during the thermal crystallization of Se thin films, a thin Te layer (<1 nm) was inserted below the Se layer to increase the adhesion of Se to the window layers. [ 3,4,6,7,14,15,32 ] 5) Thermal evaporation of the MoO 3 hole transfer layer (HTL) and Au bottom electrode: 6) Patterning of the Au electrode: Au electrodes were patterned with an iodine‐based etchant. 7) Plasma etching of Se and MoO 3 layers: MoO 3 and Se layers were etched through Au patterns as etching masks using O 2 plasma etching at a flow rate of 30 sccm for O 2 and radio frequency (RF) power of 300 W for 3 min.…”
Section: Device Fabricationmentioning
confidence: 99%
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“…Because the re‐evaporation, pinholes, and peeling off from the beneath layer were caused by increasing residual stress during the thermal crystallization of Se thin films, a thin Te layer (<1 nm) was inserted below the Se layer to increase the adhesion of Se to the window layers. [ 3,4,6,7,14,15,32 ] 5) Thermal evaporation of the MoO 3 hole transfer layer (HTL) and Au bottom electrode: 6) Patterning of the Au electrode: Au electrodes were patterned with an iodine‐based etchant. 7) Plasma etching of Se and MoO 3 layers: MoO 3 and Se layers were etched through Au patterns as etching masks using O 2 plasma etching at a flow rate of 30 sccm for O 2 and radio frequency (RF) power of 300 W for 3 min.…”
Section: Device Fabricationmentioning
confidence: 99%
“…Because the re-evaporation, pinholes, and peeling off from the beneath layer were caused by increasing residual stress during the thermal crystallization of Se thin films, a thin Te layer (<1 nm) was inserted below the Se layer to increase the adhesion of Se to the window layers. [3,4,6,7,14,15,32] 4 and Table 1 show the photographs of the fabricated Ga 2 O 3 /Se micro-PD and the thickness of each layer, respectively.…”
Section: Device Design and Principlementioning
confidence: 99%
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