(Invited) New Approaches for Shrinking the Performance Gap for GaN Power Devices

Abstract

The expected performance of GaN and SiC based power devices far exceeds that of Si power transistors, but the gap between the expected and achieved performance is much larger for GaN transistors. In this paper, we discuss new approaches for shrinking the performance gap for GaN power devices. They include using the quantum well channel designs that lead to the electron wave function penetration into wide band gap cladding layers with the commensurate increase in the breakdown voltage while keeping the advantage of a high mobility in the device channel. The gate edge engineering (beyond just using field plates) optimizes the voltage distribution in the drain-to-gate spacing. It could be combined with a low conducting passivation for smoothing or even eliminating the sharp maximum of the electric field in the vicinity of the gate and field plate edges. Additional contacts in the drain-to-gate spacing for the field control and variable doping implants should allow for further optimization. The perforated channel designs could alleviate both the parasitic series resistance problem and the heat dissipation problem. Extending the gate perforations into the drain-to-gate region allows for a considerable reduction of the switching RC constant with a commensurate decrease in power dissipation. The ultimate design could use the lateral-vertical structures. The AlInN/AlN/GaN technology is uniquely poised for the breakthrough in high temperature performance. We predict that the combination of these approaches will dramatically shrink the performance gap firmly establishing GaN as a superb material for power applications.