Investigations and Physical Modelling of Saturation Effects in Lateral DMOS Transistor Architectures Based on the Concept of Intrinsic Drain Voltage

Anghel, Costin; Hefyene, N.; Ionescu, A. M.; Vermandel, M.; Bakeroot, Benoit; Doutreloigne, Jan; Gillon, Renaud; Frere, S.; Maier, C.; Mourier, Y.

doi:10.1109/essderc.2001.195285

Cited by 24 publications

(7 citation statements)

References 3 publications

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“…As found in literature [12], the intrinsic drain voltage always remains at lower values for entire bias domain. So the drift region can be modeled through a non-linear bias-dependent drift resistor.…”

Section: A Drift Resistance Modelingmentioning

confidence: 73%

High voltage LDMOSFET modeling using BSIM6 as intrinsic-MOS model

Sahoo

Agarwal

Yadav

et al. 2013

2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)

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Here, we report high voltage MOSFET modeling using BSIM6 model. The model has two components -intrinsic MOSFET channel of LDMOS modeled by BSIM6 and a drift region modeled by non-linear drift resistance. BSIM6 is the next generation bulk MOSFET model in BSIM family of models. It also have the model of Self Heating Effect (SHE) which is very important for high power devices like LDMOS. This model shows good behaviour over wide range of gate and drain bias conditions including convergence. Some of the effects like Quasisaturation, self-heating and impact ionization are modelled by the combination of BSIM6 and drift-resistance models. We have validated this model on the simulated characteristics generated by TCAD and then, on the measured characteristics of a LDMOS device, where it shows excellent accuracy over entire bias range.

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Section: A Drift Resistance Modelingmentioning

confidence: 73%

High voltage LDMOSFET modeling using BSIM6 as intrinsic-MOS model

Sahoo

Agarwal

Yadav

et al. 2013

2013 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia)

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“…for which only one solution is meaningful: V KS ≈ 2.51 V. The intrinsic voltage, V K , remains at low level throughout the bias range [7]. The effect of velocity saturation on DMOS output characteristics is illustrated for a 50-V VDMOS in Fig.…”

Section: Quasi-saturationmentioning

confidence: 99%

“…7.2 [6,7]. The point K (key point) in the figure represents the drain end of the intrinsic NMOS [7].…”

Section: The Drift Regionmentioning

confidence: 99%

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High-Voltage and Power Transistors

El-Kareh¹,

Hutter²

2015

Silicon Analog Components

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This chapter focuses mainly on the drain-extended MOS transistor, DEMOS, for high voltage applications, and on the lateral double-diffused MOS transistor, LDMOS, for high power applications. In both cases, the drain is extended with a lightly-doped region, referred to as the drift region, to sustain the high voltage. The chapter begins with an analysis of the drift region and its optimization, typically by reduced surface-field (RESURF) techniques. The transistor switching performance is then analyzed, followed by a discussion of DEMOS and LDMOS design considerations and characteristics. High-voltage and high-current effects are then described, including quasi-saturation, body current, on-state breakdown, and safe operating area (SOA). The chapter concludes with selected high-voltage device applications. IntroductionThe MOSFETs discussed in Chap. 6 are designed for digital, analog, mixed-signal, and RF applications that operate in the low-to-medium voltage range of about 0.8-6 V. Many analog applications, however, require transistors that can handle voltages above 20 V and currents in the ampere range. Those transistors are referred to as high-voltage and power transistors. This chapter provides a comprehensive analysis of the drain-extended MOS transistor (DEMOS), for high-voltage and low-current applications, and the lateral double-diffused MOS (LDMOS) transistor, LDMOS, for power applications. (The "D" in LDMOS describes the sequential (double) diffusion of boron and arsenic through the same oxide opening, defining a precise channel length (Chap. 9). The "L" means that the current path is parallel to the silicon surface (lateral), as opposed to "V" in VDMOS where the current is nearly vertical to the silicon surface.) Schematic cross sections of both transistors (Table 7.1). The DEMOS is typically processed without added process complexity, whereas the LDMOS requires optimization of the P-body and N-drift regions to achieve high voltages and currents while minimizing the drain-to-source resistance and transistor area.The interest in bipolar, CMOS, and DMOS (BCD) technologies has been driven primarily by the proliferation of portable electronics, automotive electronics, and the need for energy efficiency. These applications cluster around different operating points, with 24 V for portable electronics; 60 V for automotive, solar, and LED backlighting; 85 V for power over Ethernet; 120 V for telecommunication; and 700 V for offline LED lighting, consumer, and industrial applications. As a result, BCD is now the technology of choice to realize power ICs by most integrated device manufacturers (IDM) and foundries [1][2][3][4][5].This chapter focuses mainly on transistors with voltage capabilities in the range of 20-700 V, where the bulk of the product applications lie.

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“…The systems, where such devices are used, range from power components for automotive and consumer products [2] up to radio frequency applications [6][7][8]. Therefore, compact modeling of HV-MOS is an enabling factor that will help in predicting how these devices can be optimally integrated in complex architectures [9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24][25][26]. More particularly, the RF characterization and modeling of HV-MOS should receive extra attention since the high-frequency behavior is, still, a quite demanding and challenging issue.…”

Section: Introductionmentioning

confidence: 99%

RF Compact Modeling of High-voltage MOSFETs

et al. 2012

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The High-Voltage MOSFET is used in a wide variety of applications covering from power systems up to RF-IC. Compact models that describe the high-frequency behavior of the device are required to predict high-frequency operation and switching capabilities of these elements in HV state-of-the-art systems. In this paper, an RF model is presented and verified against extensive Y-parameter measurements, which were carried out on a long channel Lateral doubleDiffusion MOS device. Assessment of the model with measurements confirms the validity of this approach.

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Investigations and Physical Modelling of Saturation Effects in Lateral DMOS Transistor Architectures Based on the Concept of Intrinsic Drain Voltage

Cited by 24 publications

References 3 publications

High voltage LDMOSFET modeling using BSIM6 as intrinsic-MOS model

High voltage LDMOSFET modeling using BSIM6 as intrinsic-MOS model

High-Voltage and Power Transistors

RF Compact Modeling of High-voltage MOSFETs

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